AMIMON AMN12310 WHDI, Datasheet

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Interfaces
Version 0.5
AMIMON Confidential 19
3.3.1.2 Timing Requirements
Table 5: Audio Interface Output Timing
Symbol Parameter MIN TYP MAX Units
TSCKCYC SCK period 325 976 ns
TSCKFREQ SCK frequency 1.024 3.072 MHz
TSCKDUTY SCK duty cycle 40 60 %
TDCKPDR Propagation delay after SCK rising edge 25 ns
TDCKPDF Propagation delay after SCK falling edge 25 ns
3.3.1.3 Timing Diagram
T
SCKCYC
T
DCKPDR
T
SCKDUTY
SCK
SD,WS
50%
T
SCKCYC
T
DCKPDF
T
SCKDUTY
SCK
SD,WS
50%
E
DGE
=
1
E
DGE
=
0
Figure 6: I
2
S Output Timings
3.3.1.4 MCLK Specifications
In addition, AMN2210 outputs a MCLK signal which is synchronized to and a multiple of the WS. The default
configuration of the MCLK frequency is 256 times the sampling frequency of the audio signal. For example, if the
audio sampling frequency is 48 KHz, the MCLK frequency will be 12.288 MHz. The following table provides the
specification of the MCLK –