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AMD Am186 Series, Instruction Set

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Instruction Set Summary

A-13

75

0111 0101

disp-8

JNE rel8
JNZ rel8

76

0111 0110

disp-8

JBE rel8
JNA rel8

77

0111 0111

disp-8

JA rel8
JNBE rel8

78

0111 1000

disp-8

JS rel8

79

0111 1001

disp-8

JNS rel8

7A

0111 1010

disp-8

JPE rel8
JP rel8

7B

0111 1011

disp-8

JPO rel8
JNP rel8

7C

0111 1100

disp-8

JL rel8
JNGE rel8

7D

0111 1101

disp-8

JGE rel8
JNL rel8

7E

0111 1110

disp-8

JLE rel8
JNG rel8

7F

0111 1111

disp-8

JG rel8
JNLE rel8

80

1000 0000

mod 000 r/m

(disp-low),(disp-high),data-8

ADD r/m8,imm8

mod 001 r/m

(disp-low),(disp-high),data-8

OR r/m8,imm8

mod 010 r/m

(disp-low),(disp-high),data-8

ADC r/m8,imm8

mod 011 r/m

(disp-low),(disp-high),data-8

SBB r/m8,imm8

mod 100 r/m

(disp-low),(disp-high),data-8

AND r/m8,imm8

mod 101 r/m

(disp-low),(disp-high),data-8

SUB r/m8,imm8

mod 110 r/m

(disp-low),(disp-high),data-8

XOR r/m8,imm8

mod 111 r/m

(disp-low),(disp-high),data-8

CMP r/m8,imm8

81

1000 0001

mod 000 r/m

(disp-low),(disp-high),data-low, data-high

ADD r/m16,imm16

mod 001 r/m

(disp-low),(disp-high),data-low, data-high

OR r/m16,imm16

mod 010 r/m

(disp-low),(disp-high),data-low, data-high

ADC r/m16,imm16

mod 011 r/m

(disp-low),(disp-high),data-low, data-high

SBB r/m16,imm16

mod 100 r/m

(disp-low),(disp-high),data-low, data-high

AND r/m16,imm16

mod 101 r/m

(disp-low),(disp-high),data-low, data-high

SUB r/m16,imm16

mod 110 r/m

(disp-low),(disp-high),data-low, data-high

XOR r/m16,imm16

mod 111 r/m

(disp-low),(disp-high),data-low, data-high

CMP r/m16,imm16

82

1000 0010

reserved

83

1000 0011

mod 000 r/m

(disp-low),(disp-high),data-SX

ADD r/m16,imm8

mod 001 r/m

(disp-low),(disp-high),data-SX

OR r/m16,imm8

mod 010 r/m

(disp-low),(disp-high),data-SX

ADC r/m16,imm8

mod 011 r/m

(disp-low),(disp-high),data-SX

SBB r/m16,imm8

mod 100 r/m

(disp-low),(disp-high),data-SX

AND r/m16,imm8

mod 101 r/m

(disp-low),(disp-high),data-SX

SUB r/m16,imm8

mod 110 r/m

(disp-low),(disp-high),data-SX

XOR r/m16,imm8

mod 111 r/m

(disp-low),(disp-high),data-SX

CMP r/m16,imm8

Table A-3

Instruction Set Summary by Opcode

Opcode

Instruction Format

      Byte 1
Hex       Binary

Byte 2

Bytes 3–6

Summary of Contents for Am186 Series

Page 1: ...Am186 and Am188 Family Instruction Set Manual February 1997...

Page 2: ...accurate in all respects at the time of publication but is subject to change without notice AMD assumes no responsibility for any errors or omissions and disclaims responsibility for any consequences...

Page 3: ...e and cost enhancements PURPOSE OF THIS MANUAL Each member of the Am186 and Am188 family of microcontrollers shares the standard 186 instruction set This manual describes that instruction set Details...

Page 4: ...scriptions absolute maximum ratings operating ranges switching characteristics and waveforms connection diagrams and pinouts and package physical dimensions 20071 E86 Family Support Tools Brief Lists...

Page 5: ...PTER 2 INSTRUCTION SET OVERVIEW 2 1 OVERVIEW 2 1 2 2 INSTRUCTION FORMAT 2 1 2 2 1 Instruction Prefixes 2 1 2 2 2 Segment Override Prefix 2 2 2 2 3 Opcode 2 2 2 2 4 Operand Address 2 2 2 2 5 Displaceme...

Page 6: ...rd 4 24 CLC Clear Carry Flag 4 26 CLD Clear Direction Flag 4 29 CLI Clear Interrupt Enable Flag 4 31 CMC Complement Carry Flag 4 33 CMP Compare Components 4 34 CMPS Compare String Components 4 36 CWD...

Page 7: ...124 JS Jump If Sign 4 126 JZ Jump If Zero 4 128 LAHF Load AH with Flags 4 129 LDS Load DS with Segment and Register with Offset 4 131 LEA Load Effective Address 4 133 LEAVE Leave High Level Procedure...

Page 8: ...7 SAHF Store AH in Flags 4 209 SAL Shift Arithmetic Left 4 211 SAR Shift Arithmetic Right 4 214 SBB Subtract Numbers with Borrow 4 216 SCAS Scan String for Component 4 219 SHL Shift Left 4 224 SHR Shi...

Page 9: ...Memory and i O Space 1 4 Figure 1 5 Supported Data Types 1 6 Figure 2 1 Instruction Mnemonic and Name Sample 2 4 Figure 2 2 Instruction Forms Table Sample 2 4 LIST OF TABLES Table 1 1 Segment Registe...

Page 10: ...Table of Contents x...

Page 11: ...s to particular locations within a segment The addressing modeselectsthespecificregisters for operandandaddress calculations Stack Pointer Register All stack operations POP POPA POPF PUSH PUSHA PUSHF...

Page 12: ...nstruction indicates how each flag bit is affected by that instruction Figure 1 2 Processor Status Flags Register FLAGS Bits 15 12 Reserved Bit 11 Overflow Flag OF Set if the signed result cannot be e...

Page 13: ...ag You can use CF to indicate the outcome of a procedure such as when searching a string for a character For instance if the character is found you can use STC to set CF to 1 if the character is not f...

Page 14: ...ands in memory must specify implicitly or explicitly a 16 bit segment value and a 16 bit offset value The 16 bit segment values are contained in one of four internal segment registers CS DS ES and SS...

Page 15: ...used by using segment override as a spare data segment When a segment register is not specified for a data movement instruction it s assumed to be a data segment An instruction prefix can be used to...

Page 16: ...gment limits Figure 1 5 graphically represents the data types supported by the Am186 and Am188 microcontrollers Figure 1 5 Supported Data Types 7 0 Signed Byte Magnitude Magnitude 7 0 MSB Unsigned Byt...

Page 17: ...the BX or BP base registers n Index contents of either the SI or DI index registers Any carry from the 16 bit addition is ignored Eight bit displacements are sign extended to 16 bit values Combination...

Page 18: ...Programming 1 8...

Page 19: ...ivalent In machine language all instructions conform to one basic format However the length of an instruction in machine language varies depending on the operands used in the instruction and the opera...

Page 20: ...sp low and disp high are absent 01 DISP disp low sign extended to 16 bits disp high is absent 10 DISP disp high disp low 0 1 2 3 4 5 6 7 Segment Override Prefix 0 0 1 1 1 0 00 ES Register 01 CS Regist...

Page 21: ...100 AH SP 101 CH BP 110 DH SI 111 BH DI When mod 11 depends on instruction Table 2 3 r m field r m Description 000 EA BX SI DISP 001 EA BX DI DISP 010 EA BP SI DISP 011 EA BP DI DISP 100 EA SI DISP 1...

Page 22: ...lder indicates the size and type of operand that is allowed Form Opcode Description Clocks Am186 Am188 MUL r m8 F6 4 AX r m byte AL 26 28 32 34 26 28 32 34 MUL r m16 F7 4 DX AX r m word AX 35 37 41 43...

Page 23: ...AH 4 CH 5 DH 6 and BH 7 If the Opcode byte specifies a word register the registers are assigned as follows AX 0 CX 1 DX 2 BX 3 SP 4 BP 5 SI 6 and DI 7 sr The Auxiliary aux field in the Operand Address...

Page 24: ...syntax for each mnemonic 2 4 5 Description This section contains a more in depth description of the instruction This parameter Indicates that The number of clocks required for a register operand is d...

Page 25: ...rocedure SEGMENT define segment SIZE return integer size and TYPE return integer type Pseudo Code Function Action cat componenta componentb Component A is concatenated with component B execute instruc...

Page 26: ...ips This section contains hints and ideas about some of the ways in which the instruction can be used Tips are marked with this icon 2 4 10 Related Instructions This section lists other instructions r...

Page 27: ...on on page 3 1 n Binary Arithmetic on page 3 2 n Block Structured Language on page 3 3 n Comparison on page 3 3 n Control Transfer on page 3 3 n Data Movement on page 3 5 n Decimal Arithmetic on page...

Page 28: ...monic Name See Page ADC Add Numbers with Carry 4 10 ADD Add Numbers 4 14 INC Increment Number by One 4 69 Mnemonic Name See Page DEC Decrement Number by One 4 48 SBB Subtract Numbers with Borrow 4 216...

Page 29: ...mpare 4 243 Mnemonic Name See Page CMPS Compare String Components 4 36 CMPSB Compare String Bytes Synonym for CMPS 4 36 CMPSW Compare String Words Synonym for CMPS 4 36 SCAS Scan String for Component...

Page 30: ...ump If Not Below or Equal Synonym for JA 4 78 Mnemonic Name See Page JE Jump If Equal 4 89 JNE Jump If Not Equal 4 107 Mnemonic Name See Page JC Jump If Carry Synonym for JB 4 82 JNC Jump If Not Carry...

Page 31: ...Name See Page CALL Call Procedure 4 21 INT Generate Interrupt 4 73 IRET Interrupt Return 4 76 JMP Jump Unconditionally 4 99 RET Return from Procedure 4 202 Mnemonic Name See Page MOV Move Component 4...

Page 32: ...nstructions That Are Used with Decimal Numbers Mnemonic Name See Page POP Pop Component from Stack 4 175 POPA Pop All 16 Bit General Registers from Stack 4 178 POPF Pop Flags from Stack 4 180 PUSH Pus...

Page 33: ...8 Flag Single Flag Instructions Multiple Flag Instructions Mnemonic Name See Page AAA ASCII Adjust AL After Addition 4 2 AAD ASCII Adjust AX Before Division 4 4 AAM ASCII Adjust AL After Multiplicatio...

Page 34: ...Word from Port Synonym for INS 4 71 OUTS Output String Component to Port 4 173 OUTSB Output String Byte to Port Synonym for OUTS 4 173 OUTSW Output String Word to Port Synonym for OUTS 4 173 Mnemonic...

Page 35: ...string After executing a string instruction the microcontroller automatically increments or decrements SI and DI so that they contain the offsets of the next components in their strings The microcontr...

Page 36: ...t 4 237 STOSB Store String Byte Synonym for STOS 4 237 STOSW Store String Word Synonym for STOS 4 237 Mnemonic Name See Page CMPS Compare String Components 4 36 CMPSB Compare String Bytes Synonym for...

Page 37: ...Components 4 36 CMPSB Compare String Bytes Synonym for CMPS 4 36 CMPSW Compare String Words Synonym for CMPS 4 36 CWD Convert Word Integer to Doubleword 4 40 DAA Decimal Adjust AL After Addition 4 42...

Page 38: ...ump If Not Zero Synonym for JNE 4 107 JO Jump If Overflow 4 119 JP Jump If Parity Synonym for JPE 4 122 JPE Jump If Parity Even 4 122 JPO Jump If Parity Odd 4 124 JS Jump If Sign 4 126 JZ Jump If Zero...

Page 39: ...epeat While Not Zero Synonym for REPNE 4 197 REPZ Repeat While Zero Synonym for REPE 4 193 RET Return from Procedure 4 202 ROL Rotate Left 4 205 ROR Rotate Right 4 207 SAHF Store AH in Flags 4 209 SAL...

Page 40: ...Instruction Set Listing 3 14...

Page 41: ...NSTRUCTION SET 4 1 INSTRUCTIONS This chapter contains a complete description of each instruction that is supported by the Am186 and Am188 family of microcontrollers For an explanation of the format of...

Page 42: ...and sets the Carry and Auxiliary Carry Flags CF and AF If there is no decimal carry AAA clears CF and AF and leaves the AH register unchanged AAA sets the top nibble of the AL register to 0 Operation...

Page 43: ...to determine whether an adjustment is needed This is the only use for AF Related Instructions If you want to See Add two numbers and the value of CF ADC Add two numbers ADD Convert an 8 bit unsigned...

Page 44: ...example divides a two digit unpacked decimal number by a one digit unpacked decimal number Form Opcode Description Clocks Am186 Am188 AAD D5 0A ASCII adjust AX before division 15 15 AAD convert AX to...

Page 45: ...microcontroller can only divide unpacked decimal numbers To divide packed decimal numbers unpack them first Related Instructions If you want to See Divide an unsigned number by another unsigned numbe...

Page 46: ...ation It Performs Flag Settings After Instruction Examples This example multiplies two unpacked decimal digits Form Opcode Description Clocks Am186 Am188 AAM D4 0A ASCII adjust AL after multiplication...

Page 47: ...quotient and remainder occupy the opposite halves of the result Tips The microcontroller can only multiply unpacked decimal numbers To multiply packed decimal numbers unpack them first To convert an u...

Page 48: ...AH and sets CF and AF If there is no decimal borrow AAS clears CF and AF and leaves AH unchanged AAS sets the top nibble of AL to 0 Operation It Performs Flag Settings After Instruction Form Opcode D...

Page 49: ...cimal arithmetic AAA AAS DAA and DAS use AF to determine whether an adjustment is needed This is the only use for AF Related Instructions If you want to See Convert an 8 bit unsigned binary difference...

Page 50: ...to AL with carry 3 3 ADC AX imm16 15 iw Add immediate word to AX with carry 4 4 ADC r m8 imm8 80 2 ib Add immediate byte to r m byte with carry 4 16 4 16 ADC r m16 imm16 81 2 iw Add immediate word to...

Page 51: ...if low byte of result has even number of set bits PF 0 otherwise CF 1 for carry or borrow to high order bit CF 0 otherwise res res res SF 1 if result is 0 or positive SF 0 if result is negative ZF 1 i...

Page 52: ...an instruction that performs decimal addition To add decimal numbers use ADDtoperform binary addition andthen converttheresult todecimal using AAA or DAA ADC ADD SBB and SUB set AF when the result nee...

Page 53: ...o See Convert an 8 bit unsigned binary sum to its unpacked decimal equivalent AAA Add two numbers ADD Convert an 8 bit integer to its 16 bit equivalent CBW Convert an 8 bit unsigned binary sum to its...

Page 54: ...3 ADD AX imm16 05 iw Add immediate word to AX 4 4 ADD r m8 imm8 80 0 ib Add immediate byte to r m byte 4 16 4 16 ADD r m16 imm16 81 0 iw Add immediate word to r m word 4 16 4 20 ADD r m16 imm8 83 0 i...

Page 55: ...8 7 6 5 4 3 2 1 0 Processor Status Flags Register reserved OF DF IF TF SF ZF AF PF CF undefined unchanged OF 1 if result larger than destination operand OF 0 otherwise AF 1 if carry or borrow to low...

Page 56: ...converted for decimal arithmetic AAA AAS DAA and DAS use AF to determine whether an adjustment is needed This is the only use for AF Related Instructions If you want to See Convert an 8 bit unsigned...

Page 57: ...81 4 iw AND immediate word with r m word 4 16 4 20 AND r m16 imm8 83 4 ib AND sign extended immediate byte with r m word 4 16 4 20 AND r m8 r8 20 r AND byte register with r m byte 3 10 3 10 AND r m16...

Page 58: ...in the high nibble of the byte Related Instructions If you want to See Toggle all bits of a component NOT Set particular bits of a component to 1 OR Toggle particular bits of a component XOR BCD_MASK...

Page 59: ...d operand The upper bound value is stored at a consecutive higher memory address 2 If the first operand is out of the specified bounds BOUND issues an Interrupt 5 Request The saved IP points to the BO...

Page 60: ...ndex value to see if it falls within the range of an array Related Instructions If you want to See Compare two components using subtraction and set the flags accordingly CMP Generate an interrupt INT...

Page 61: ...r or memory location from which the 16 bit absolute segment offset is fetched CALL stores the result in the IP register CALL ptr16 16 and CALL m16 16 are far calls They use a long pointer to the calle...

Page 62: ...re m16 16 far call save return segment push CS if procedure ptr16 16 far direct call CS IP ptr16 16 else far indirect call CS IP m16 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Processor Status Flags Reg...

Page 63: ...the correct call near or far based on the declaration of the called procedure Related Instructions If you want to See Stop executing the current sequence of instructions and begin executing another J...

Page 64: ...ettings After Instruction Examples This example converts an 8 bit integer to its 16 bit equivalent before adding it to another 16 bit integer Form Opcode Description Clocks Am186 Am188 CBW 98 Put sign...

Page 65: ...s If you want to See Add two numbers with the value of CF ADC Add two numbers ADD Convert a 16 bit integer to its 32 bit equivalent CWD Divide an integer by another integer IDIV Subtract a number and...

Page 66: ...he bits of a byte to the left making sure that the high bit remains 0 Form Opcode Description Clocks Am186 Am188 CLC F8 Clear Carry Flag 2 2 CLC clear carry flag CF 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2...

Page 67: ...nd ES specify the same segment of memory ASSUME DS DATASEG ES DATASEG set up segment registers with same segment MOV AX DATASEG copy data segment to AX MOV DS AX copy AX to DS MOV ES AX copy AX to ES...

Page 68: ...t found you can use CLC to clear CF to 0 Then subsequent instructions that do not affect CF can use its value to determine the appropriate course of action To rotate a 0 into a component use CLC to cl...

Page 69: ...0 using CLD the bytes are filled one by one from first to last Form Opcode Description Clocks Am186 Am188 CLD FC Clear Direction Flag so the Source Index SI and or the Destination Index DI registers...

Page 70: ...port in I O memory to a string in main memory INS Copy a component from a string in memory to a register LODS Copy a component from one string in memory to another string in memory MOVS Copy a compone...

Page 71: ...are not recognized at the end of the CLI instruction or from that point on until IF is set Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 CLI FA Clear...

Page 72: ...affect the flags after the IRET If you disable maskable interrupts using CLI the microcontroller does not recognize maskable interrupt requests until the instruction that follows STI is executed Afte...

Page 73: ...ks Am186 Am188 CMC F5 Complement Carry Flag 2 2 If you want to See Clear the value of CF to 0 CLC Rotate the bits of a component and CF to the left RCL Rotate the bits of a component and CF to the rig...

Page 74: ...diate byte to AL 3 3 CMP AX imm16 3D iw Compare immediate word to AX 4 4 CMP r m8 imm8 80 7 ib Compare immediate byte to r m byte 3 10 3 10 CMP r m16 imm16 81 7 iw Compare immediate word to r m word 3...

Page 75: ...F AF PF CF undefined unchanged OF 1 if result larger than destination operand OF 0 otherwise AF 1 if carry or borrow to low nibble AF 0 otherwise PF 1 if low byte of result has even number of set bits...

Page 76: ...respectively Form Opcode Description Clocks Am186 Am188 CMPS m8 m8 A6 Compare byte ES DI to byte segment SI 22 22 CMPS m16 m16 A7 Compare word ES DI to word segment SI 22 26 CMPSB A6 Compare byte ES...

Page 77: ...onent SI SI increment DI DI increment 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Processor Status Flags Register reserved OF DF IF TF SF ZF AF PF CF undefined unchanged OF 1 if result larger than destinati...

Page 78: ...uality notify assembler DS and ES point to different segments of memory ASSUME DS SEG_D ES SEG_E set up DS and ES with different segment addresses MOV AX SEG_D load one segment into DS MOV DS AX DS po...

Page 79: ...or REPNZ prefix to execute CMPS repeatedly If no corresponding components match ZF is cleared to 0 The string instructions always advance SI and or DI regardless of the use of the REP prefix Be sure t...

Page 80: ...fter Instruction Examples This example divides one 16 bit integer by another 16 bit integer Form Opcode Description Clocks Am186 Am188 CWD 99 Put signed extension of AX in DX AX 4 4 CWD extend sign of...

Page 81: ...use CWD to convert the dividend into its 32 bit equivalent and then use IDIV to perform the division Related Instructions If you want to See Convert an 8 bit integer to its 16 bit equivalent CBW Divi...

Page 82: ...should consist of two packed BCD digits DAA adjusts the AL register to contain the correct two digit packed decimal result Operation It Performs Form Opcode Description Clocks Am186 Am188 DAA 27 Decim...

Page 83: ...F 0 otherwise res res res SF 1 if result is 0 or positive SF 0 if result is negative ZF 1 if result equal to 0 ZF 0 if result not equal to 0 PADDEND1 DB 00h 24h 17h 08h 241708 packed BCD PADDEND2 DB 0...

Page 84: ...AS use AF to determine whether an adjustment is needed This is the only use for AF Related Instructions If you want to See Convert an 8 bit unsigned binary sum to its unpacked decimal equivalent AAA A...

Page 85: ...ould consist of two packed BCD digits DAS adjusts the AL register to contain the correct packed two digit decimal result Operation It Performs Form Opcode Description Clocks Am186 Am188 DAS 2F Decimal...

Page 86: ...high order bit CF 0 otherwise res res res SF 1 if result is 0 or positive SF 0 if result is negative ZF 1 if result equal to 0 ZF 0 if result not equal to 0 PBCD1 DB 24h 17h 08h 241708 packed BCD PBC...

Page 87: ...whether an adjustment is needed This is the only use for AF Related Instructions If you want to See Convert an 8 bit unsigned binary difference to its unpacked decimal equivalent AAS Convert an 8 bit...

Page 88: ...m word 3 15 3 19 DEC r16 48 rw Subtract 1 from word register 3 3 DEC minuend decrement minuend minuend minuend 1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Processor Status Flags Register reserved OF DF IF...

Page 89: ...e by 1 each time the loop is executed TheLOOP instructioncanbe usedtocombine thedecrement DECCX only and conditional jump into one instruction Related Instructions If you want to See Add 1 to a number...

Page 90: ...s too large to fit in the low half of the dividend such as when dividing by 0 DIV generates Interrupt 0 instead of setting CF DIV truncates nonintegral quotients toward 0 Operation It Performs Form Op...

Page 91: ...r Status Flags Register reserved OF DF IF TF SF ZF AF PF CF undefined unchanged res res res UDIVIDEND DB 97 61h UDIVISOR DB 6 06h divide byte by byte MOV AL UDIVIDEND AL 61h 97 MOV AH 0 AX 0061h 97 DI...

Page 92: ...d numbers by powers of 2 When dividing an unsigned number by a power of 2 it is faster to use SHR than DIV The Am186 and Am188 microcontrollers do not provide an instruction that performs decimal divi...

Page 93: ...pecifies the lexical nesting level 0 31 of the procedure within the high level language source code The nesting level determines the number of stack frame pointers that are copied to the new stack fra...

Page 94: ...d frame pointers push BP framePointer SP if level 0 reserve storage for each nesting level for i 1 i level i BP BP 2 push BP push framePointer update base and frame pointers BP framePointer SP SP byte...

Page 95: ...of 0 If a procedure is called by another then use ENTER with a level of 1 for the main procedure use ENTER with a level of 2 for the procedure it calls and so on Related Instructions If you want to Se...

Page 96: ...ecessary pinout Form Opcode Description Clocks Am186 Am188 ESC m D8 0 Takes trap 7 N A N A ESC m D9 1 Takes trap 7 N A N A ESC m DA 2 Takes trap 7 N A N A ESC m DB 3 Takes trap 7 N A N A ESC m DC 4 Ta...

Page 97: ...ipheral asserts one of the microcontroller s maskable interrupt requests that is not masked off by its interrupt control register or an external device issues a nonmaskable interrupt request by assert...

Page 98: ..._ADDR MOV AX 0C07Fh OUT DX AX MOV DX PIO_DIR0_ADDR MOV AX 0 OUT DX AX MOV CX 0FFh ISR_D_LOOP MOV AX 0Fh bottom 4 LEDs mLED_OUTPUT turn them on macro MOV AX 0F0h top 4 LEDs mLED_OUTPUT turn them on mac...

Page 99: ...p On board peripherals including timers serial ports and DMA continue to operate in HLT These devices may issue interrupts which bring the processor out of HLT Related Instructions If you want to See...

Page 100: ...the dividend with the remainder and the low half of the dividend with the quotient As in traditional mathematics the sign of the remainder is always the same as the sign of the dividend If the quotien...

Page 101: ...AL temp quotient if size divisor 16 signed word division temp DX AX divisor if size temp size AX quotient too large interrupt 0 else DX DX AX divisor remainder AX temp quotient 15 14 13 12 11 10 9 8 7...

Page 102: ...aster to use SAR than IDIV When dividing unsigned numbers use DIV instead of IDIV to make it obvious to someone who reads your code that you are operating on unsigned numbers Related Instructions If y...

Page 103: ...ct the multiplicand and the immediate integer by which the multiplicand is to be multiplied the multiplier IMUL preserves the multiplicand Integer immediate multiplies were not available on the origin...

Page 104: ...sign into AX AH 0xFF else AH 0x00 clear overflow and carry flags OF CF 0 else word result store result AX temp set overflow and carry flags OF CF 1 if size multiplicand 16 signed word multiplication t...

Page 105: ...uct 0x00FF temp set overflow and carry flags OF CF 1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Processor Status Flags Register reserved OF DF IF TF SF ZF AF PF CF undefined unchanged For the single operan...

Page 106: ...ears CF and OF to 0 otherwise IMUL sets CF and OF to 1 When using the two or three operand forms of IMUL the product can easily be large enough so that it does not fit in the destination Before using...

Page 107: ...nd The upper eight bits of the port address will be 0 when an 8 bit port number is used Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 IN AL imm8 E4 i...

Page 108: ...Copy a component from a port in I O memory to a string in main memory INS Copy a component from a register to a port in I O memory OUT Copy a component from a string in main memory to a port in I O me...

Page 109: ...1 3 15 3 19 INC r16 40 rw Increment word register by 1 3 3 INC addend increment addend addend addend 1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Processor Status Flags Register reserved OF DF IF TF SF ZF...

Page 110: ...lt or detect a signed result that is too large to fit in the destination Use INC within a loop when you want to increase a value by 1 each time the loop is executed Related Instructions If you want to...

Page 111: ...ister decrements The DI register increments or decrements by 1 if the input is a byte or by 2 if it is a word The INSB and INSW instructions are synonyms for the byte and word INS instructions respect...

Page 112: ...esses CLD Copy a component from a port in I O memory to a register IN Copy a component from a register to a port in I O memory OUT Copy a component from a string in main memory to a port in I O memory...

Page 113: ...flow Flag OF is set to 1 when the microcontroller executes INTO then INTO generates a type 4 interrupt This is equivalent to executing INT 4 If OF is cleared to 0 INTO does nothing and the microcontro...

Page 114: ...sor Status Flags register are pushed onto the stack before the return address Unlike interrupts generated by external hardware INT does not set an interrupt s in service bit in the In Service INSERV r...

Page 115: ...tion Set 4 75 INT INT Related Instructions If you want to See Call a procedure CALL End an interrupt handler and resume the interrupted procedure IRET End a procedure and return to the calling procedu...

Page 116: ...stack and then resumes the interrupted procedure Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 IRET CF Return from interrupt handler to interrupted p...

Page 117: ...ag and disable all maskable interrupts CLI Generate a software interrupt INT End a procedure and return to the calling procedure RET Set the interrupt enable flag enabling all maskable interrupts STI...

Page 118: ...is made to the location provided as the operand Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 JA rel8 77 cb Jump short if above CF 0 and ZF 0 13 4 1...

Page 119: ...mparison was below or equal JBE Jump if the result of a previous integer comparison was greater JG Jump unconditionally JMP Set the flags according to whether particular bits of a component are set to...

Page 120: ...ided as the operand Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 JAE rel8 73 cb Jump short if above or equal CF 0 13 4 13 4 JNB rel8 73 cb Jump shor...

Page 121: ...P farlabel based on the JAE condition nearlabel Related Instructions If you want to See Compare two components using subtraction and set the flags accordingly CMP Jump if the result of a previous unsi...

Page 122: ...ded as the operand Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 JB rel8 72 cb Jump short if below CF 1 13 4 13 4 JC rel8 72 cb Jump short if carry C...

Page 123: ...nt to See Compare two components using subtraction and set the flags accordingly CMP Jump if the result of a previous unsigned comparison was above or equal JAE Jump if the result of a previous intege...

Page 124: ...ade to the location provided as the operand Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 JBE rel8 76 cb Jump short if below or equal CF 1 or ZF 1 13...

Page 125: ...JMP farlabel based on the JBE condition nearlabel Related Instructions If you want to See Compare two components using subtraction and set the flags accordingly CMP Jump if the result of a previous un...

Page 126: ...C and JNAE stop executing the current sequence of instructions and begin executing a new sequence of instructions otherwise execution continues with the next instruction See JB on page 4 82 for a comp...

Page 127: ...given condition is true CX 0 a short jump is made to the location provided as the operand Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 JCXZ rel8 E3...

Page 128: ...See Jump to the top of a loop if CX is not 0 LOOP Jump to the top of a loop if CX is not 0 and two compared components are equal LOOPE Jump to the top of a loop if CX is not 0 and two compared compone...

Page 129: ...s the operand Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 JE rel8 74 cb Jump short if equal ZF 1 13 4 13 4 JZ rel8 74 cb Jump short if 0 ZF 1 13 4...

Page 130: ...the JE condition nearlabel Related Instructions If you want to See Compare two components using subtraction and set the flags accordingly CMP Jump unconditionally JMP Jump if the result of a previous...

Page 131: ...s true ZF 0 and SF OF a short jump is made to the location provided as the operand Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 JG rel8 7F cb Jump s...

Page 132: ...MP farlabel based on the JG condition nearlabel Related Instructions If you want to See Compare two components using subtraction and set the flags accordingly CMP Jump if the result of a previous unsi...

Page 133: ...true SF OF a short jump is made to the location provided as the operand Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 JGE rel8 7D cb Jump short if gr...

Page 134: ...JMP farlabel based on the JGE condition nearlabel Related Instructions If you want to See Compare two components using subtraction and set the flags accordingly CMP Jump if the result of a previous un...

Page 135: ...ition is true SF OF a short jump is made to the location provided as the operand Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 JL rel8 7C cb Jump sho...

Page 136: ...farlabel based on the JL condition nearlabel Related Instructions If you want to See Compare two components using subtraction and set the flags accordingly CMP Jump if the result of a previous unsign...

Page 137: ...is true ZF 1 or SF OF a short jump is made to the location provided as the operand Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 JLE rel8 7E cb Jump...

Page 138: ...P farlabel based on the JLE condition nearlabel Related Instructions If you want to See Compare two components using subtraction and set the flags accordingly CMP Jump if the result of a previous unsi...

Page 139: ...ibutes segment size attribute 16 only The result is stored in the 16 bit IP register n Near Indirect Jumps The JMP r m16 form specifies a register or memory location from which the procedure absolute...

Page 140: ...IP displacement if label rel16 near direct branch to labeled instruction IP IP label if label r m16 near indirect branch to labeled instruction IP label if label ptr16 16 far direct branch to labeled...

Page 141: ...tatement Tips JMP is the only jump instruction that transfers execution to a far address modifies both CS and IP Related Instructions If you want to See Call a procedure CALL branch according to the v...

Page 142: ...ZF JBE and JNA stop executing the current sequence of instructions and begin executing a new sequence of instructions otherwise execution continues with the next instruction See JBE on page 4 84 for...

Page 143: ...JC and JNAE stop executing the current sequence of instructions and begin executing a new sequence of instructions otherwise execution continues with the next instruction See JB on page 4 82 for a co...

Page 144: ...JNB and JNC stop executing the current sequence of instructions and begin executing a new sequence of instructions otherwise execution continues with the next instruction See JAE on page 4 80 for a c...

Page 145: ...ag ZF JA and JNBE stop executing the current sequence of instructions and begin executing a new sequence of instructions otherwise execution continues with the next instruction See JA on page 4 78 for...

Page 146: ...JNB and JNC stop executing the current sequence of instructions and begin executing a new sequence of instructions otherwise execution continues with the next instruction See JAE on page 4 80 for a c...

Page 147: ...ed as the operand Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 JNE rel8 75 cb Jump short if not equal ZF 0 13 4 13 4 JNZ rel8 75 cb Jump short if no...

Page 148: ...lowing sequence of statements JE nearlabel This does the equivalent of a long jump JMP farlabel based on the JNE condition nearlabel Related Instructions If you want to See Compare two components usin...

Page 149: ...g OF so that they are not the same JLE and JNG stop executing the current sequence of instructions and begin executing a new sequence of instructions otherwise execution continues with the next instru...

Page 150: ...that they are not the same JL and JNGE stop executing the current sequence of instructions and begin executing a new sequence of instructions otherwise execution continues with the next instruction S...

Page 151: ...o that they are the same JGE and JNL stop executing the current sequence of instructions and begin executing a new sequence of instructions otherwise execution continues with the next instruction See...

Page 152: ...Flag OF so that they are the same JG and JNLE stop executing the current sequence of instructions and begin executing a new sequence of instructions otherwise execution continues with the next instru...

Page 153: ...OF 0 a short jump is made to the location provided as the operand Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 JNO rel8 71 cb Jump short if not over...

Page 154: ...This does the equivalent of a long jump JMP farlabel based on the JNO condition nearlabel Related Instructions If you want to See Compare two components using subtraction and set the flags accordingly...

Page 155: ...PO and JNP stop executing the current sequence of instructions and begin executing a new sequence of instructions otherwise execution continues with the next instruction See JPO on page 4 124 for a co...

Page 156: ...0 a short jump is made to the location provided as the operand Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 JNS rel8 79 cb Jump short if not sign S...

Page 157: ...This does the equivalent of a long jump JMP farlabel based on the JNS condition nearlabel Related Instructions If you want to See Compare two components using subtraction and set the flags accordingly...

Page 158: ...E and JNZ stop executing the current sequence of instructions and begin executing a new sequence of instructions otherwise execution continues with the next instruction See JNE on page 4 107 for a com...

Page 159: ...tion Tips If you need to jump to an instruction at farlabel that is more than 128 bytes away use the following sequence of statements JNO nearlabel This does the equivalent of a long jump JMP farlabel...

Page 160: ...ant to See Compare two components using subtraction and set the flags accordingly CMP Jump unconditionally JMP Jump if the result of a previous operation cleared OF to 0 JNO Set the flags according to...

Page 161: ...E and JP stop executing the current sequence of instructions and begin executing a new sequence of instructions otherwise execution continues with the next instruction See JPE on page 4 122 for a comp...

Page 162: ...rovided as the operand Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 JPE rel8 7A cb Jump short if parity even PF 1 13 4 13 4 JP rel8 7A cb Jump short...

Page 163: ...is does the equivalent of a long jump JMP farlabel based on the JPE condition nearlabel Related Instructions If you want to See Compare two components using subtraction and set the flags accordingly C...

Page 164: ...ovided as the operand Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 JPO rel8 7B cb Jump short if parity odd PF 0 13 4 13 4 JNP rel8 7B cb Jump short...

Page 165: ...This does the equivalent of a long jump JMP farlabel based on the JPO condition nearlabel Related Instructions If you want to See Compare two components using subtraction and set the flags accordingly...

Page 166: ...F 1 a short jump is made to the location provided as the operand Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 JS rel8 78 cb Jump short if sign SF 1...

Page 167: ...is does the equivalent of a long jump JMP farlabel based on the JS condition nearlabel Related Instructions If you want to See Compare two components using subtraction and set the flags accordingly CM...

Page 168: ...JE and JZ stop executing the current sequence of instructions and begin executing a new sequence of instructions otherwise execution continues with the next instruction See JE on page 4 89 for a compl...

Page 169: ...H bit 7 Sign Flag Operation It Performs Flag Settings After Instruction Examples This example clears the Carry Flag CF to 0 Normally you use CLC to perform this operation Form Opcode Description Clock...

Page 170: ...Flags register onto the stack PUSHF Copy AH to the low byte of the Processor Status Flags register SAHF SMINUEND DW 6726 SSUBTRAHEND DW 22531 prevent subtraction from modifying CF which is used as a...

Page 171: ...ttings After Instruction Examples This example calls a procedure whose address is stored in a doubleword in memory Form Opcode Description Clocks Am186 Am188 LDS r16 m16 16 C5 r Load DS r16 with segme...

Page 172: ...struction Set 4 132 LDS LDS Related Instructions If you want to See Load the offset of a memory component into a register LEA Load a full address stored in a doubleword into ES and another register LE...

Page 173: ...es are filled one by one from first to last Form Opcode Description Clocks Am186 Am188 LEA r16 m16 8D r Load offset for m16 word in 16 bit register 6 6 LEA offset component copy offset of component of...

Page 174: ...Set 4 134 LEA LEA Related Instructions If you want to See Load a full address stored in a doubleword into DS and another register LDS Load a full address stored in a doubleword into ES and another re...

Page 175: ...es by copying BP to SP and then restores the calling procedure s frame by popping its frame pointer into BP Operation It Performs Flag Settings After Instruction This instruction was not available on...

Page 176: ...variables and indicate that it is not called by another procedure The procedure uses LEAVE to remove the local variables from the stack and restore BP procedure that is not called by another Main PROC...

Page 177: ...procedure but it does not need to pass them back as output parameters use RET components after LEAVE to return and pop the input parameters from the stack Related Instructions If you want to See Rese...

Page 178: ...nd a second operand specified register The first 16 bits are in ES and the remaining 16 bits are placed into the register specified by offset Operation It Performs Flag Settings After Instruction Form...

Page 179: ...STRING_ADDR DD STRING full address of STRING NUMCHARS EQU 8 copy eight characters DELTA EQU 4 4 bytes away direct assembler that DS and ES point to different segments of memory ASSUME DS SEG_1 ES SEG_...

Page 180: ...for the entire repeated instruction LOCK prevents DMA cycles until the entire LOCK instruction is complete this includes a LOCK REP string instruction LOCK prevents the processor from acknowledging a...

Page 181: ...t source segment LODSB and LODSW are synonyms for the byte and word LODS instructions respectively Form Opcode Description Clocks Am186 Am188 LODS m8 AC Load byte segment SI in AL 12 12 LODS m16 AD Lo...

Page 182: ...F 0 forward increment 1 else backward increment 1 if size source 16 load words AX DS SI if DF 0 forward increment 2 else backward increment 2 point to next string component SI SI increment 15 14 13 12...

Page 183: ...into ES MOV ES AX ES points to SEG_S source initialize and use source string exchange DS for ES the microcontroller does not allow you to override the segment register it uses to address the destinati...

Page 184: ...other instructions to perform the custom operation and then use STOS to copy the component back to memory To overwrite the original string with the results set up DI with the same offset as SI before...

Page 185: ...omponent from a port in I O memory to a string in main memory INS Copy a component from one string to another string MOVS Copy a component from a string in main memory to a port in I O memory OUTS Rep...

Page 186: ...of operations 1 Executes the instructions between label and LOOP label 2 Subtracts 1 from the unsigned number in CX 3 Performs a short jump to the label if CX is not 0 When CX is 0 the microcontrolle...

Page 187: ...uctions JMP Jump to the top of a loop if CX is not 0 and two compared components are equal LOOPE Jump to the top of a loop if CX is not 0 and two compared components are not equal LOOPNE LIST DB 01h 0...

Page 188: ...The microcontroller performs the following sequence of operations 1 Executes the instructions between label and LOOPE label 2 Subtracts 1 from the unsigned number in CX 3 Performs a short jump to the...

Page 189: ...CX is not 0 and two compared components are not equal LOOPNE 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Processor Status Flags Register reserved OF DF IF TF SF ZF AF PF CF undefined unchanged res res res R...

Page 190: ...NE The microcontroller performs the following sequence of operations 1 Executes the instructions between label and LOOPNE label 2 Subtracts 1 from the unsigned number in CX 3 Performs a short jump to...

Page 191: ...if CX is not 0 and two compared components are equal LOOPE 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Processor Status Flags Register reserved OF DF IF TF SF ZF AF PF CF undefined unchanged res res res CHA...

Page 192: ...ed number in CX tells the microcontroller the maximum number of times to execute the sequence Once the microcontroller compares two components and finds they are not equal the loop is no longer execut...

Page 193: ...ster to r m word 2 11 2 15 MOV sreg r m16 8E sr Copy r m word to segment register 2 9 2 13 MOV AL moffs8 A0 Copy byte at segment offset to AL 8 8 MOV AX moffs16 A1 Copy word at segment offset to AX 8...

Page 194: ...red in the same segment If you set up DS and ES with different segment addresses you must copy the value in one of them to the other or override the source segment before using MOVS define stack segme...

Page 195: ...ant to See Copy a component from a port in I O memory to a string in main memory INS Copy a component from one string in memory to another string in memory MOVS Copy a component from a string in main...

Page 196: ...escription Clocks Am186 Am188 MOVS m8 m8 A4 Copy byte segment SI to ES DI 14 14 MOVS m16 m16 A5 Copy word segment SI to ES DI 14 18 MOVSB A4 Copy byte DS SI to ES DI 14 14 MOVSW A5 Copy word DS SI to...

Page 197: ...ard increment 1 else backward increment 1 if size destination 16 copy words ES DI DS SI if DF 0 forward increment 2 else backward increment 2 point to next string component DI DI increment SI SI incre...

Page 198: ...U 4 4 bytes away direct assembler that DS and ES point to different segments of memory ASSUME DS SEG_1 ES SEG_2 set up DS and ES with different segment addresses MOV AX SEG_1 load one segment into DS...

Page 199: ...execute MOVS repeatedly The string instructions always advance SI and or DI regardless of the use of the REP prefix Be sure to set or clear DF before any string instruction Related Instructions If yo...

Page 200: ...that the number by which it is to be multiplied the multiplier is in AL or AX MUL uses the multiplier that is the same size as the multiplicand MUL places the result in AX or DX AX The destination is...

Page 201: ...emp extend into AX AH 0x00 clear overflow and carry flags OF CF 0 else word result store result AX temp set overflow and carry flags OF CF 1 if size multiplicand 16 unsigned word multiplication temp m...

Page 202: ...nsigned number by an immediate number or you don t want the result to overwrite AL or AX use the second and third forms of IMUL instead of MUL Although designed for multiplying integers these forms of...

Page 203: ...egation of r m byte 3 10 3 10 NEG r m16 F7 3 Perform a two s complement negation of r m word 3 10 3 14 NEG integer if integer 0 clear carry flag CF 0 else set carry flag CF 1 change sign of integer in...

Page 204: ...EG INTEGER2 INTEGER2 F9C0h 1600 signed addition INTEGER1 INTEGER1 INTEGER2 ADD INTEGER1 INTEGER2 INTEGER1 0190h 400 defined in SEG_C segment SOURCE DB 20 DUP DESTINATION DB LENGTH SOURCE DUP notify as...

Page 205: ...Settings After Instruction Examples This example shows a delay loop Form Opcode Description Clocks Am186 Am188 NOP 90 Perform no operation 3 3 NOP exchange AX with AX to pass time temp AX AX AX AX tem...

Page 206: ...4 166 NOP NOP Tips Use NOP during a debugging session to fill code space left vacant after replacing an instruction with a shorter instruction Related Instructions If you want to See Suspend instructi...

Page 207: ...of an 8 bit value in memory Themicrocontroller changes each 0 to a 1 and each 1 to a 0 Form Opcode Description Clocks Am186 Am188 NOT r m8 F6 2 Complement each bit in r m byte 3 10 3 10 NOT r m16 F7...

Page 208: ...tes the signal levels in AH Before writing the PIO signal levels to the PIO Data 0 PDATA0 register the example uses NOT to convert them to negative logic Related Instructions If you want to See Clear...

Page 209: ...OR r m16 imm16 81 1 iw OR immediate word with r m word 4 16 4 20 OR r m16 imm8 83 1 ib OR immediate byte with r m word 4 16 4 20 OR r m8 r8 08 r OR byte register with r m byte 3 10 3 10 OR r m16 r16 0...

Page 210: ...II equivalent use OR to add 30h ASCII 0 to the digit Related Instructions If you want to See Clear particular bits of a component to 0 AND Toggle all bits of a component NOT Toggle particular bits of...

Page 211: ...register as the first operand If the instruction contains an 8 bit port number that value is zero extended to 16 bits Operation It Performs Flag Settings After Instruction Form Opcode Description Clo...

Page 212: ...S Copy a component from a string in main memory to a port in I O memory OUTS assert PIO pins 15 14 and 5 0 set up PIO pins 15 0 as outputs MOV DX PIO_DIR0_ADDR address of PDIR0 register MOV AX 0 0 out...

Page 213: ...synonyms for the byte and word OUTS instructions You can use the REP prefix with the OUTS instruction for block output of CX bytes or words This instruction was not available on the original 8086 808...

Page 214: ...lower to higher addresses CLD Copy a component from a port in I O memory to a register IN Copy a component from a port in I O memory to a string located in main memory INS Copy a component from a regi...

Page 215: ...id stack during an interrupt A pop to memory instruction that uses the stack pointer as a base register references memory after the POP The base is the value of the stack pointer after the instruction...

Page 216: ...S specify different segments of memory ASSUME DS SEG_A ES SEG_B set up segment registers with different segments MOV AX SEG_A load one segment into DS MOV DS AX DS points to SEG_A MOV AX SEG_B load an...

Page 217: ...onto the stack use CALL to call another procedure and then use POP to pop the parameters from the stack Use PUSH to temporarily save the intermediate results of a multistep calculation Use PUSH to sa...

Page 218: ...ous PUSHA restoring the general registers to their values before the PUSHA instruction was executed POPA pops the DI register first Operation It Performs Flag Settings After Instruction This instructi...

Page 219: ...calling procedure using a general register copy the parameter to the register after POPA Related Instructions If you want to See Pop a component from the stack POP Pop a component from the stack into...

Page 220: ...uctions or calling procedure use PUSHF to save the Processor Status Flags register After the instruction or the procedure CALL use POPF to restore the saved flags Related Instructions Form Opcode Desc...

Page 221: ...ystems Form Opcode Description Clocks Am186 Am188 PUSH m16 FF 6 Push memory word onto stack 16 20 PUSH r16 50 rw Push register word onto stack 10 14 PUSH imm8 6A Push sign extended immediate byte onto...

Page 222: ...another segment into ES MOV ES AX ES points to SEG_S source initialize and use source string exchange DS for ES the microcontroller does not allow you to override the segment register it uses to addre...

Page 223: ...nto the stack use CALL to call another procedure and then use POP to pop the parameters from the stack Use PUSH to temporarily save the intermediate results of a multistep calculation Use PUSH to save...

Page 224: ...which they were given they appear in the 16 new stack bytes in reverse order The last register pushed is the DI register Operation It Performs Flag Settings After Instruction This instruction was not...

Page 225: ...calling procedure using a general register copy the parameter to the register after POPA Related Instructions If you want to See Pop components from the stack into the 16 bit general registers POPA P...

Page 226: ...tion of the following instructions or calling procedure use PUSHF to save the Processor Status Flags register After the instruction or the procedure call use POPF to restore the saved flags Related In...

Page 227: ...8086 8088 systems Form Opcode Description Clocks Am186 Am188 RCL r m8 1 D0 2 Rotate 9 bits of CF and r m byte left once 2 15 2 15 RCL r m8 CL D2 2 Rotate 9 bits of CF and r m byte left CL times 5 n 1...

Page 228: ...to the right RCR Rotate the bits of a component to the left ROL Rotate the bits of a component to the right ROR Multiply an integer by a power of 2 SAL SHL Divide an integer by a power of 2 SAR Shift...

Page 229: ...de Description Clocks Am186 Am188 RCR r m8 1 D0 3 Rotate 9 bits of CF and r m byte right once 2 15 2 15 RCR r m8 CL D2 3 Rotate 9 bits of CF and r m byte right CL times 5 n 17 n 5 n 17 n RCR r m8 imm8...

Page 230: ...and the value of CF to the left RCL Rotate the bits of a component to the left ROL Rotate the bits of a component to the right ROR Multiply an integer by a power of 2 SAL SHL Divide an integer by a p...

Page 231: ...cription Clocks Am186 Am188 REP INS m8 DX F3 6C Input CX bytes from port in DX to ES DI 8 8n 8 8n REP INS m16 DX F3 6D Input CX words from port in DX to ES DI 8 8n 12 8n REP LODS m8 F3 AC Load CX byte...

Page 232: ...ring in memory MOVS Copy a component from a string in main memory to a port in I O memory OUTS Repeat one string comparison instruction while the components are the same REPE Repeat one string compari...

Page 233: ...0 When CX is 0 or ZF is 0 the microcontroller begins executing the next instruction REPZ is a synonym for REPE Form Prefix Opcode Description Clocks Am186 Am188 REPE CMPS m8 m8 F3 A6 Find nonmatching...

Page 234: ...s Flag Settings After Instruction Instruction prefixes do not affect the flags See the instruction being repeated for the flag values while CX 0 repeat while equal serviceInterrupts execute instructio...

Page 235: ...E ES SEG_E set up segment registers with same segment MOV AX SEG_E load segment into DS MOV DS AX DS points to SEG_E source MOV ES AX ES points to SEG_E destination compare one string for equality to...

Page 236: ...her looping construct Related Instructions If you want to See Process string components from lower to higher addresses CLD Compare a component in one string to a component in another string CMPS Repea...

Page 237: ...in CX 4 Compares ZF with 1 When CX is 0 or ZF is 1 the microcontroller begins executing the next instruction REPNZ is a synonym for REPNE Form Prefix Opcode Description Clocks Am186 Am188 REPNE CMPS m...

Page 238: ...ms Flag Settings After Instruction Instruction prefixes do not affect the flags See the instruction being repeated for the flag values while CX 0 repeat while not equal serviceInterrupts execute instr...

Page 239: ...e same segment ASSUME DS SEG_S ES SEG_S set up segment registers with same segment MOV AX SEG_S load segment into DS MOV DS AX DS points to SEG_S MOV ES AX ES points to SEG_S scan string for integer i...

Page 240: ...another looping construct Related Instructions If you want to See Process string components from lower to higher addresses CLD Compare a component in one string to a component in another string CMPS R...

Page 241: ...components and finds they are not equal the instruction is no longer executed See REPE on page 4 193 for a complete description Form Prefix Opcode Description Clocks Am186 Am188 REPZ CMPS m8 m8 F3 A6...

Page 242: ...the stack is an offset which is popped into the instruction pointer The CS register is unchanged For the intersegment far return the address on the stack is a long pointer The offset is popped first...

Page 243: ...SP remove storage from stack SP SP 2 If far return if opcode CB or opcode CA copy return segment from stack CS SS SP if operands 1 remove storage from stack SP SP 2 SP SP components 15 14 13 12 11 10...

Page 244: ...l variables of a procedure from the stack LEAVE initialize and program serial port for transmit write zero terminated string to serial port in polled mode input parameters offset of string pushed on s...

Page 245: ...immediates were not available on the original 8086 8088 systems Form Opcode Description Clocks Am186 Am188 ROL r m8 1 D0 0 Rotate 8 bits of r m byte left once 2 15 2 15 ROL r m8 CL D2 0 Rotate 8 bits...

Page 246: ...te the bits of a component and the value of CF to the right RCR Rotate the bits of a component to the right ROR Multiply an integer by a power of 2 SAL SHL Divide an integer by a power of 2 SAR Shift...

Page 247: ...on the original 8086 8088 systems Form Opcode Description Clocks Am186 Am188 ROR r m8 1 D0 1 Rotate 8 bits of r m byte right once 2 15 2 15 ROR r m8 CL D2 1 Rotate 8 bits of r m byte right CL times 5...

Page 248: ...the bits of a component to the left ROL Multiply an integer by a power of 2 SAL SHL Divide an integer by a power of 2 SAR Shift the bits of the operand downward SHR 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1...

Page 249: ...perform this operation Form Opcode Description Clocks Am186 Am188 SAHF 9E Store AH in low byte of the Processor Status Flags register 3 3 SAHF copy AH to low byte of FLAGS FLAGS FLAGS 0x00FF AH 0xD5 1...

Page 250: ...from the stack into the Processor Status Flags register POPF Push the Processor Status Flags register onto the stack PUSHF Process string components from higher to lower addresses STD Enable maskable...

Page 251: ...ption Clocks Am186 Am188 SAL r m8 1 D0 4 Multiply r m byte by 2 once 2 15 2 15 SAL r m8 CL D2 4 Multiply r m byte by 2 CL times 5 n 17 n 5 n 17 n SAL r m8 imm8 C0 4 ib Multiply r m byte by 2 imm8 time...

Page 252: ...s Flags Register reserved OF DF IF TF SF ZF AF PF CF undefined unchanged Undefined unless single bit shift then OF 1 if result larger than destination operand OF 0 otherwise res res res 0 SF 1 if resu...

Page 253: ...y two integers IMUL Multiply two unsigned numbers MUL Rotate the bits of a component and the value of CF to the left RCL Rotate the bits of a component and the value of CF to the right RCR Rotate the...

Page 254: ...ion It Performs Shift immediates were not available on the original 8086 8088 systems Form Opcode Description Clocks Am186 Am188 SAR r m8 1 D0 7 Perform a signed division of r m byte by 2 once 2 15 2...

Page 255: ...t ROL Rotate the bits of a component to the right ROR Multiply an integer by a power of 2 SAL SHL Divide an unsigned number by a power of 2 SHR 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Processor Status F...

Page 256: ...orrow 4 4 SBB r m8 imm8 80 3 ib Subtract immediate byte from r m byte with borrow 4 16 4 16 SBB r m16 imm16 81 3 iw Subtract immediate word from r m word with borrow 4 16 4 20 SBB r m16 imm8 83 3 ib S...

Page 257: ...F 0 otherwise res res res SF 1 if result is 0 or positive SF 0 if result is negative ZF 1 if result equal to 0 ZF 0 if result not equal to 0 UMINUEND DQ 3B865520F4DE89A1h USUBTRAHEND DQ 0C285DE70893BB...

Page 258: ...bers larger than 16 bits use SUB to subtract the low words and then use SBB to subtract each of the subsequently higher words The processor does not provide an instruction that performs decimal subtra...

Page 259: ...rements If DF is 1 see STD on page 4 231 it decrements The increment or decrement amount is 1 for bytes or 2 for words The SCASB and SCASW instructions are synonyms for the byte and word SCAS instruct...

Page 260: ...ponent DI DI increment 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Processor Status Flags Register reserved OF DF IF TF SF ZF AF PF CF undefined unchanged OF 1 if result larger than destination operand OF 0...

Page 261: ...he same segment of memory ASSUME DS SEG_L ES SEG_L set up segment registers with same segment MOV AX SEG_L load segment into DS and ES MOV DS AX DS points to SEG_L MOV ES AX ES points to SEG_L initial...

Page 262: ...pecify the same segment of memory ASSUME DS SEG_R ES SEG_R set up segment registers with same segment MOV AX SEG_R load segment into DS and ES MOV DS AX DS points to SEG_R MOV ES AX ES points to SEG_R...

Page 263: ...n value use the REPNE or REPNZ prefix to execute SCAS repeatedly If no components match the given value ZF is cleared to 0 The string instructions always advance SI and or DI regardless of the use of...

Page 264: ...8 systems Form Opcode Description Clocks Am186 Am188 SHL r m8 1 D0 4 Multiply r m byte by 2 once 2 15 2 15 SHL r m8 CL D2 4 Multiply r m byte by 2 CL times 5 n 17 n 5 n 17 n SHL r m8 imm8 C0 4 ib Mult...

Page 265: ...han 31 Operation It Performs Shift immediates were not available on the original 8086 8088 systems Form Opcode Description Clocks Am186 Am188 SHR r m8 1 D0 5 Divide unsigned r m byte by 2 once 2 15 2...

Page 266: ...ive SF 0 if result is negative ZF 1 if result equal to 0 ZF 0 if result not equal to 0 PF 1 if low byte of result has even number of set bits PF 0 otherwise CF 0 unless shift lengths are less than or...

Page 267: ...use SHR than DIV Related Instructions If you want to See Divide an unsigned number by another unsigned number DIV Divide an integer by another integer IDIV Rotate the bits of a component and the value...

Page 268: ...y maintaining a 1 in the low bit of the word Form Opcode Description Clocks Am186 Am188 STC F9 Set the Carry Flag to 1 2 2 STC set carry flag CF 1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Processor Statu...

Page 269: ...ecify the same segment of memory ASSUME DS SEG_R ES SEG_R set up segment registers with same segment MOV AX SEG_R load segment into DS and ES MOV DS AX DS points to SEG_R MOV ES AX ES points to SEG_R...

Page 270: ...d you can use STC to set CF to 1 if the character is not found you can use CLC to clear CF to 0 Then subsequent instructions that do not affect CF can use its value to determine the appropriate course...

Page 271: ...rement the index registers on which they operate SI or DI or both Operation It Performs Flag Settings After Instruction Form Opcode Description Clocks Am186 Am188 STD FD Set the Direction Flag so the...

Page 272: ...g WORKSPACE FILLER DB Am186EM notify assembler DS and ES specify the same segment of memory ASSUME DS SEG_T ES SEG_T set up segment registers with same segment MOV AX SEG_T load segment into DS and ES...

Page 273: ...cify different segments of memory ASSUME DS SEG_A ES SEG_B set up segment registers with different segments MOV AX SEG_A load one segment into DS MOV DS AX DS points to SEG_A MOV AX SEG_B load another...

Page 274: ...instruction Related Instructions If you want to See Process string components from lower to higher addresses CLD Compare a component in one string with a component in another string CMPS Copy a compo...

Page 275: ...as at the end of a subroutine RET executes before processing any external interrupts If external interrupts are disabled and the program executes STI before a CLI instruction no external interrupts ar...

Page 276: ...them as soon as possible to reduce the possibility of missing maskable interrupt requests INT clears IF to 0 IRET restores IF to its value prior to calling the interrupt routine Related Instructions...

Page 277: ...If DF is 1 see STD on page 4 231 the register decrements The increment or decrement amount is 1 for a byte or 2 for a word STOSB and STOSW are synonyms for the byte and word STOS instructions These f...

Page 278: ...t 1 if size destination 16 store words ES DI AX if DF 0 forward increment 2 else backward increment 2 point to location for next string component DI DI increment 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0...

Page 279: ...OS to copy the component back to memory To overwrite the original string with the results set up DI with the same offset as SI before beginning the loop The string instructions always advance SI and o...

Page 280: ...te byte from AL 3 3 SUB AX imm16 2D iw Subtract immediate word from AX 4 4 SUB r m8 imm8 80 5 ib Subtract immediate byte from r m byte 4 16 4 16 SUB r m16 imm16 81 5 iw Subtract immediate word from r...

Page 281: ...d OF DF IF TF SF ZF AF PF CF undefined unchanged OF 1 if result larger than destination operand OF 0 otherwise AF 1 if carry or borrow to low nibble AF 0 otherwise PF 1 if low byte of result has even...

Page 282: ...the loop is executed The processor does not provide an instruction that performs decimal subtraction To subtract decimal numbers use SBB or SUB to perform binary subtraction and then convert the resu...

Page 283: ...yte with AL 3 3 TEST AX imm16 A9 iw AND immediate word with AX 4 4 TEST r m8 imm8 F6 0 ib AND immediate byte with r m byte 4 10 4 10 TEST r m16 imm16 F7 0 iw AND immediate word with r m word 4 10 4 14...

Page 284: ...struction Tips If you want a procedure to branch depending on the value of one or more bits use TEST to test those bits and affect ZF and then use JZ or JNZ Related Instructions If you want to See Cle...

Page 285: ...pin and executing WAIT is the same as performing a NOP Operation It Performs Flag Settings After Instruction This instruction is not supported with the necessary pinout Form Opcode Description Clocks...

Page 286: ...rd register 3 3 XCHG r m8 r8 86 r Exchange byte register with r m byte 4 17 4 17 XCHG r8 r m8 86 r Exchange r m byte with byte register 4 17 4 17 XCHG r m16 r16 87 r Exchange word register with r m wo...

Page 287: ...to exchange a word with a segment register To copy a segment address to a segment register use MOV to copy the segment address to a general register and then use MOV to copy the value in the general r...

Page 288: ...index into AL before executing XLAT Use the no operand form XLATB if the table referenced by BX resides in the DS segment Operation It Performs Flag Settings After Instruction Form Opcode Description...

Page 289: ...t up for string operation LEA SI STRING load source offset segment DS LEA DI STRING load dest offset segment DS MOV CX 10 set up counter CLD process string from low to high LEA BX TABLE load table bas...

Page 290: ...XLAT to translate bytes from one code system to another e g from unpacked decimal numbers to ASCII numbers or from ASCII characters to EBCDIC characters Related Instructions If you want to See Load th...

Page 291: ...r m16 imm16 81 6 iw XOR immediate word with r m word 4 16 4 20 XOR r m16 imm8 83 6 ib XOR sign extended immediate byte with r m word 4 16 4 20 XOR r m8 r8 30 r XOR byte register with r m byte 3 10 3...

Page 292: ...icular bits of a component to 0 AND Toggle all bits of a component NOT Set particular bits of a component to 1 OR TMR2_CNT_ON EQU 0C000h mask for enable inhibit bits turn on Timer 2 MOV DX TMR2_CTL_AD...

Page 293: ...2 Instruction Set Summary by Mnemonic on page A 3 n Table A 3 Instruction Set Summary by Opcode on page A 10 n Table A 4 Instruction Set Summary by Partial Opcode on page A 20 The variables used in th...

Page 294: ...X DISP reg Represents a register and is assigned according to the value of w and reg 000 AL if w 0 or implicit 8 bit AX if w 1 or implicit 16 bit 001 CL if w 0 or implicit 8 bit CX if w 1 or implicit...

Page 295: ...er to either 0 0 1 0 0 0 d w mod reg r m Immediate to register memory 1 0 0 0 0 0 s w mod 100 r m data 8 data low data highifsw 01 sw 10 Immediate to accumulator 0 0 1 0 0 1 0 w data 8 data low data h...

Page 296: ...1 0 0 1 1 0 2 2 ESC Processor extension escape 1 1 0 1 1 X X X mod YYY r m XXX YYY are opcodeto proc ext 4 56 HLT Halt 1 1 1 1 0 1 0 0 4 57 IDIV Integer divide signed 1 1 1 1 0 1 1 w mod 111 r m 4 60...

Page 297: ...t within seg 1 1 1 1 1 1 1 1 mod 100 r m Direct intersegment 1 1 1 0 1 0 1 0 disp low disp high seg low seg high Indirect intersegment 1 1 1 1 1 1 1 1 mod 101 r m mod 11 JNE JNZ Jump on not equal not...

Page 298: ...1 0 0 0 1 1 0 0 mod 0 sreg r m MOVS MOVSB MOVSW Move string to byte word 1 0 1 0 0 1 0 w 4 156 MUL Multiply unsigned 1 1 1 1 0 1 1 w mod 100 r m 4 160 NEG Change sign reg memory 1 1 1 1 0 1 1 w mod 0...

Page 299: ...ata 8 REP repeat by count in CX 4 191 INS Input string from DX port 1 1 1 1 0 0 1 1 0 1 1 0 1 1 0 w LODS Load string 1 1 1 1 0 0 1 1 1 0 1 0 1 1 0 w MOVS Move string 1 1 1 1 0 0 1 1 1 0 1 0 0 1 0 w OU...

Page 300: ...1 r m Register Memory by CL 1 1 0 1 0 0 1 w mod 111 r m Register Memory by Count 1 1 0 0 0 0 0 w mod 111 r m data 8 SBB Subtract with borrow 4 216 Reg memory and register to either 0 0 0 1 1 0 d w mod...

Page 301: ...a high if w 1 WAIT Wait 1 0 0 1 1 0 1 1 4 245 XCHG Exchange 4 246 Register memory with register 1 0 0 0 0 1 1 w mod reg r m Register with accumulator 1 0 0 1 0 reg XLAT XLATB Translate byte to AL 1 1...

Page 302: ...r m disp low disp high ADC r m16 r16 12 0001 0010 mod reg r m disp low disp high ADC r8 r m8 13 0001 0011 mod reg r m disp low disp high ADC r16 r m16 14 0001 0100 data 8 ADC AL imm8 15 0001 0101 data...

Page 303: ...8 0011 1000 mod reg r m disp low disp high CMP r m8 r8 39 0011 1001 mod reg r m disp low disp high CMP r m16 r16 3A 0011 1010 mod reg r m disp low disp high CMP r8 r m8 3B 0011 1011 mod reg r m disp l...

Page 304: ...0 0111 reserved 68 0110 1000 data low data high PUSH imm16 69 0110 1001 mod reg r m disp low disp high data low data high IMUL r16 r m16 imm16 IMUL r16 imm16 6A 0110 1010 data 8 PUSH imm8 6B 0110 1011...

Page 305: ...p low disp high data low data high ADD r m16 imm16 mod 001 r m disp low disp high data low data high OR r m16 imm16 mod 010 r m disp low disp high data low data high ADC r m16 imm16 mod 011 r m disp l...

Page 306: ...low disp high MOV sreg r m16 8F 1000 1111 mod 000 r m disp low disp high POP m16 90 1001 0000 NOP XCHG AX AX 91 1001 0001 XCHG AX CX XCHG CX AX 92 1001 0010 XCHG AX DX XCHG DX AX 93 1001 0011 XCHG AX...

Page 307: ...high MOV AX imm16 B9 1011 1001 data low data high MOV CX imm16 BA 1011 1010 data low data high MOV DX imm16 BB 1011 1011 data low data high MOV BX imm16 BC 1011 1100 data low data high MOV SP imm16 BD...

Page 308: ...ow data high data 8 ENTER imm16 imm8 C9 1100 1001 LEAVE CA 1100 1010 data low data high RET imm16 CB 1100 1011 RET CC 1100 1100 INT 3 CD 1100 1101 data 8 INT imm8 CE 1100 1110 INTO CF 1100 1111 IRET D...

Page 309: ...0 AAD D6 1101 0110 reserved D7 1101 0111 XLAT m8 XLATB D8 1101 1000 mod 000 r m disp low disp high ESC m D9 1101 1001 mod 001 r m disp low disp high ESC m DA 1101 1010 mod 010 r m disp low disp high E...

Page 310: ...EP MOVS m16 m16 1010 0110 REPE CMPS m8 m8 REPZ CMPS m8 m8 1010 0111 REPE CMPS m16 m16 REPZ CMPS m16 m16 1010 1010 REP STOS m8 1010 1011 REP STOS m16 1010 1100 REP LODS m8 1010 1101 REP LODS m16 1010 1...

Page 311: ...D 1111 1101 STD FE 1111 1110 mod 000 r m disp low disp high INC r m8 mod 001 r m disp low disp high DEC r m8 mod 010 r m reserved mod 011 r m reserved mod 100 r m reserved mod 101 r m reserved mod 110...

Page 312: ...l8 JBE JNA rel8 JA JNBE rel8 8x Immed r m8 imm8 Immed r m16 imm16 reserved Immed r m16 imm8 TEST r m8 r8 TEST r m16 r16 XCHG r m8 r8 XCHG r8 r m8 XCHG r m16 r16 XCHG r16 r m16 9x NOP XCHG AX AX XCHG A...

Page 313: ...imm16 IMUL r16 imm16 PUSH imm8 IMUL r16 r m16 imm8 IMUL r16 imm8 INS m8 DX INSB INS m16 DX INSW OUTS DX r m8 OUTSB OUTS DX r m16 OUTSW 7x JS rel8 JNS rel8 JPE JP rel8 JPO JNP rel8 JL JNGE rel8 JGE JNL...

Page 314: ...served DEC DEC r m16 mod 010 r m ADC RCL NOT reserved CALL r m16 mod 011 r m SBB RCR NEG reserved CALL m16 16 mod 100 r m AND SAL SHL MUL reserved JMP r m16 mod 101 r m SUB SHR IMUL reserved JMP m16 1...

Page 315: ...Multiply Unsigned Numbers instruction 4 160 NEG Two s Complement Negation instruction 4 163 SAL Shift Arithmetic Left instruction 4 211 SAR Shift Arithmetic Right instruction 4 214 SBB Subtract Numbe...

Page 316: ...45 data movement instructions IN Input Component from Port instruction 4 67 INS Input String Component from Port instruction 4 71 INSB Input String Byte from Port instruction 4 71 INSW Input String W...

Page 317: ...Component to Port instruction 4 173 OUTSB Output String Byte to Port instruction 4 173 OUTSW Output String Word to Port instruction 4 173 INS Input String Component from Port instruction 4 71 INSB Inp...

Page 318: ...L Shift Arithmetic Left instruction 4 211 SAR Shift Arithmetic Right instruction 4 214 SHL Shift Left instruction 4 211 4 224 SHR Shift Right instruction 4 225 XOR Logical Exclusive OR instruction 4 2...

Page 319: ...k segment SS 1 5 SHL Shift Left instruction 4 211 4 224 SHR Shift Right instruction 4 225 stack pointer register 1 1 status and control registers 1 1 STC Set Carry Flag instruction 4 228 STD Set Direc...

Page 320: ...ual 2 4 description 2 6 examples 2 7 flag settings after instruction 2 7 forms of the instruction 2 4 mnemonics 2 4 sample 2 4 names sample 2 4 operations 2 7 related instructions 2 8 syntax 2 6 tips...

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