AMD Am186 Series, Instruction Set, Page: 20 / 320

Instruction Set Overview 2-2
2.2.2 Segment Override Prefix
To override the default segment register, place the following byte in front of the instruction,
where RR determines which register is used. Only one segment override prefix can be
used per instruction.
2.2.3 Opcode
This specifies the machine-language opcode for an instruction. The format for the opcodes
is described on page 2-5. Although most instructions use only one opcode byte, the AAD
(D5 0A hex) and AAM (D4 0A hex) instructions use two opcodes.
2.2.4 Operand Address
The following illustration shows the structure of the operand address byte. The operand
address byte controls the addressing for an instruction.
Table 2-1 mod field
mod Description
11 r/m is treated as a reg field
00 DISP = 0, disp-low and disp-high are absent
01 DISP = disp-low sign-extended to 16-bits, disp-high
is absent
10 DISP = disp-high: disp-low
0 1 2 3 4 5 6 7
Segment Override
Prefix
0 0 1 1 1 0
00 = ES Register
01 = CS Register
10 = SS Register
11 = DS Register
R R
0 1 2 3 4 5 6 7
Along with r/m, the Modifier field determines whether the Register/Memory field is
interpreted as a register or the address of a memory operand. For a memory
operand, the Modifier field also indicates whether the operand is addressed directly
or indirectly. For indirectly addressed memory operands, the Modifier field specifies
the number of bytes of displacement that appear in the instruction. See Table 2-1
for mod values.
The Auxiliary field specifies an opcode extension or a register
that is used as a second operand. See Table 2-2 for aux values
Along with mod, the Register/Memory field
specifies a general register or the address of a
memory operand. See Table 2-3 for r/m values.
Operand Address mod aux r/m