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Instruction Set
4-211
SAL*
Shift Arithmetic Left
SAL
SHL
Shift Left
What It Does
SAL and SHL shift the bits of a component to the left, filling vacant bits with 0s.
Syntax
Description
SAL and SHL shift the bits of the operand upward. They shift the high-order bit into CF and
clear the low-order bit. The second operand (
count) indicates the number of shifts to make.
The operand is either an immediate number or the CL register contents. The processor
does not allow shift counts greater than 31; it uses only the bottom five bits of the operand
if it is greater than 31.
* – Shift immediates were not available on the original 8086/8088 systems.
Form
Opcode
Description
Clocks
Am186 Am188
SAL
r/m8,1
D0
/4
Multiply r/m byte by 2, once
2/15
2/15
SAL
r/m8,CL
D2
/4
Multiply r/m byte by 2, CL times
5+
n/17+n
5+
n/17+n
SAL
r/m8,imm8
C0
/4 ib
Multiply r/m byte by 2, imm8 times
5+
n/17+n
5+
n/17+n
SAL
r/m16,1
D1
/4
Multiply r/m word by 2, once
2/15
2/15
SAL
r/m16,CL
D3
/4
Multiply r/m word by 2, CL times
5+
n/17+n
5+
n/17+n
SAL
r/m16,imm8
C1
/4 ib
Multiply r/m word by 2, imm8 times
5+
n/17+n
5+
n/17+n
SHL
r/m8,1
D0
/4
Multiply r/m byte by 2, once
2/15
2/15
SHL
r/m8,CL
D2
/4
Multiply r/m byte by 2, CL times
5+
n/17+n
5+
n/17+n
SHL
r/m8,imm8
C0
/4 ib
Multiply r/m byte by 2, imm8 times
5+
n/17+n
5+
n/17+n
SHL
r/m16,1
D1
/4
Multiply r/m word by 2, once
2/15
2/15
SHL
r/m16,CL
D3
/4
Multiply r/m word by 2, CL times
5+
n/17+n
5+
n/17+n
SHL
r/m16,imm8
C1
/4 ib
Multiply r/m word by 2, imm8 times
5+
n/17+n
5+
n/17+n
SAL
component,count
SHL
component,count
Summary of Contents for Am186 Series
Page 1: ...Am186 and Am188 Family Instruction Set Manual February 1997...
Page 10: ...Table of Contents x...
Page 18: ...Programming 1 8...
Page 40: ...Instruction Set Listing 3 14...