AMD Am186 Series, Instruction Set

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Programming 1-4
The result is a 20-bit address of the target data or instruction. This allows for a 1-Mbyte physical
address size.
For example, if the segment register is loaded with 12A4h and the offset is 0022h, the
resultant address is 12A62h (see Figure 1-3). To find the result:
1. The segment register contains 12A4h.
2. The segment register is shifted 4 places and is now 12A40h.
3. The offset is 0022h.
4. The shifted segment address (12A40h) is added to the offset (00022h) to get 12A62h.
5. This address is placed on the address bus pins of the controller.
All instructions that address operands in memory must specify (implicitly or explicitly) a 16-
bit segment value and a 16-bit offset value. The 16-bit segment values are contained in one
of four internal segment registers (CS, DS, ES, and SS). See "Addressing Modes” on page
1-7 for more information on calculating the segment and offset values. See "Segments" on
page 1-5 for more information on the CS, DS, ES, and SS registers.
In addition to memory space, all Am186 and Am188 microcontrollers provide 64K of I/O space
(see Figure 1-4). The I/O space is described on page 1-5.
Figure 1-3 Physical-Address Generation
Figure 1-4 Memory and i/O Space
1 2 A 4 0
0 0 0 2 2
1 2 A 6 2
1 2 A 4
0 0 2 2
Segment
Base
Logical Address
Shift Left
4 Bits
Physical Address
To Memory
15 0
19 0
19 0
15 0
15 0
Offset
Memory
Space
I/O
Space
1M
64K