AMD Am186 Series, Instruction Set

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Instruction Set 4-214
SAR* Shift Arithmetic Right SAR
What It Does
SAR shifts the bits of a component to the right, filling vacant bits with the highest bit of the
original component.
Syntax
Description
SAR shifts the bits of the operand downward and shifts the low-order bit into CF. The effect
is to divide the operand by 2. SAR performs a signed divide with rounding toward negative
infinity (unlike IDIV); the high-order bit remains the same. The second operand (
count)
indicates the number of shifts to make. The operand is either an immediate number or the
CL register contents. The processor does not allow shift counts greater than 31; it only
uses the bottom five bits of the operand if it is greater than 31.
Operation It Performs
* – Shift immediates were not available on the original 8086/8088 systems.
Form Opcode Description
Clocks
Am186 Am188
SAR
r/m8,1
D0
/7
Perform a signed division of r/m byte by 2, once 2/15 2/15
SAR r/m8,CL D2 /7 Perform a signed division of r/m byte by 2, CL times 5+ n/17+n 5+ n/17+n
SAR r/m8,imm8 C0 /7 ib Perform a signed division of r/m byte by 2, imm8 times 5+ n/17+n 5+ n/17+n
SAR r/m16,1 D1 /7 Perform a signed division of r/m word by 2, once 2/15 2/15
SAR r/m16,CL D3 /7 Perform a signed division of r/m word by 2, CL times 5+ n/17+n 5+ n/17+n
SAR r/m16,imm8 C1 /7 ib Perform a signed division of r/m word by 2, imm8 times 5+ n/17+n 5+ n/17+n
SAR component,count
/* store highest bit */
temp = mostSignificantBit( component);
while (i = count; i != 0; i--)
/* perform shifts */
{
/* save lowest bit in carry flag */
CF = leastSignificantBit( component);
/* shift right and fill vacancy with sign */
component = cat(temp,(component>>1));
}
if ( count == 1)
/* single shift */
OF = 0;