First Lab: DE2 Top-Level and Default Bitstream
43
Chapter
5
Chapter 5
First Lab: DE2 Top-Level
and Default Bitstream
This lab gives users the connection assignment and top-level Verilog module,
which is the fundamental building block for all the other labs in this manual. The
bitstream created in this Lab is used as the default bitstream loaded in DE2 board
before shipping. This lab will illustrate how to compile and load the default
bitstream into the DE2 Board.
5-1
Power Up the Board
Connect your USB download cable and power supply to the DE2 board.
Push the Power ON/OFF button on the board. The Power LED will light up.
You will see the board is running with the demo code shown in Chapter 2.
5-2
The Top-level Verilog Module in Cyclone II
This section introduces you all the required elements in a Quartus II project. It will
walk you through the entire design flow using Quartus II from coding to bitstream
downloading. Perform the following steps:
Launch Quartus II Software.
Click on File > Open Project (See Figure 5.1).