ADM-XRC-5T2-ADV User Manual
Table of Contents
1.
Introduction ........................................................................................................................1
1.1.
Specifications ............................................................................................................1
2.
Hardware Installation .........................................................................................................2
2.1.
Motherboard requirements........................................................................................2
2.2.
Handling instructions.................................................................................................2
2.3.
Installing the ADM-XRC-5T2-ADV onto a PMC motherboard ..................................2
2.4.
Installing the ADM-XRC-5T2-ADV if fitted to an ADC-PMC .....................................2
2.5.
Installing the ADM-XRC-5T2-ADV if fitted to an ADC-EMC .....................................2
3.
Software Installation ..........................................................................................................2
4.
Board Description ..............................................................................................................3
4.1.
Local Bus...................................................................................................................4
4.2.
Flash Memory............................................................................................................5
4.2.1.
Board Control Flash..........................................................................................5
4.2.2.
User FPGA Flash .............................................................................................5
4.3.
Health Monitoring ......................................................................................................5
4.4.
JTAG .........................................................................................................................6
4.5.
Clocks........................................................................................................................7
4.5.1.
LCLK.................................................................................................................7
4.5.2.
REFCLK ...........................................................................................................8
4.5.3.
PCIe Reference Clock ......................................................................................8
4.5.4.
User MGT Clocks .............................................................................................8
4.5.5.
FCN MGT Clock ...............................................................................................8
4.5.6.
Rear (Pn4) Clocks ............................................................................................8
4.5.7.
PCI Clocks ........................................................................................................8
4.6.
User FPGA ................................................................................................................9
4.6.1.
Configuration ....................................................................................................9
4.6.2.
I/O Bank Voltages...........................................................................................10
4.6.3.
Memory Interfaces..........................................................................................10
4.7.
FCN Interface – MGT Links ....................................................................................11
4.7.1.
Copper Mating Cables....................................................................................11
4.7.2.
Optical Mating Cables ....................................................................................11
4.7.3.
Example Gigabit I/O Applications...................................................................12
4.7.4.
Front Panel multi-gigabit I/O Control & Status Signals ..................................12
4.8.
Pn4 I/O ....................................................................................................................13
4.8.1.
Pn4 Signalling Voltage ...................................................................................13
4.9.
XMC Interface .........................................................................................................13
4.9.1.
Primary XMC Connector, P15 ........................................................................13
4.10.
ADV212 Interface ....................................................................................................14
4.10.1.
Signal Description...........................................................................................14
4.10.2.
JPEG Processor Interface Pin Locations .......................................................15
5.
Design Examples .............................................................................................................16
5.1.
Revision History ......................................................................................................17
ADM-XRC-5T2-ADV User Manual
Version 1.0
