Alinx ZYNQ UltraScale+, User Manual, Page: 30 / 66

ZYNQ Ultr FPGA Board AXU5EV-P User Manual
30 / 66
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Among them, the IO level standard of BANK43~46 is 3.3V, and the
level standard of BANK65 and BANK66 is determined by the VCCO_65
and VCCO_66 power supply of the carrier board, but cannot 1.8V;
the level standard of MIO is also 1.8V.
Pin assignment of board to board connector J29
J29 Pin Signal Name Pin Number J29 Pin Signal Name Pin Number
1 B65_L2_N V9 2 B65_L22_P K8
3 B65_L2_P U9 4 B65_L22_N K7
5 GND - 6 GND -
7 B65_L4_N T8 8 B65_L20_P J6
9 B65_L4_P R8 10 B65_L20_N H6
11 GND - 12 GND -
13 B65_L1_N Y8 14 B65_L6_N T6
15 B65_L1_P W8 16 B65_L6_P R6
17 GND - 18 GND -
19 B65_L7_P L1 20 B65_L17_P N9
21 B65_L7_N K1 22 B65_L17_N N8
23 GND - 24 GND -
25 B65_L15_P N7 26 B65_L9_P K2
27 B65_L15_N N6 28 B65_L9_N J2
29 GND - 30 GND -
31 B65_L16_P P7 32 B65_L3_N V8
33 B65_L16_N P6 34 B65_L3_P U8
35 GND - 36 GND -
37 B65_L14_P M6 38 B65_L19_P J5
39 B65_L14_N L5 40 B65_L19_N J4
41 GND - 42 GND -
43 B65_L5_N T7 44 B65_L18_P M8
45 B65_L5_P R7 46 B65_L18_N L8
47 GND - 48 GND -
49 B65_L11_N K3 50 B65_L8_P J1
51 B65_L11_P K4 52 B65_L8_N H1
53 GND - 54 GND -