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AKM AKD4633-A, Manual

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AKM AKD4633-A Manual Download Page 13

ASAHI KASEI

[AKD4633-A]

<KM079407>

2016/10

- 13 -

(2) Output Circuits

a) AOUT Output Circuit

Figure 5. AOUT Output Circuit

b) SPK Output Circuit

Note. When mini-jack is inserted or pulled out J2 (SPK-JACK) connector, JP13 (SPP_SEL) and JP14
(SPN_SEL) should be open, or “PMSPK bit” in the AK4633VN should be set to “0”.

SPP

SPN

1

2

CN5

R15

10

R17

10

6

4

3

J2

SPK-JACK

SVSS

JP31

Dynamic

020S16

R

L

SPK1

A

K

D1

DIODE ZENER

SVSS

Dynamic(EXT)

Dynamic

Piezo(EXT)

JP14

SPP_SEL

A

K

D2

DIODE ZENER

SVSS

Dynamic

Piezo(EXT)

Dynamic(EXT)

JP13

SPN_SEL

Figure 6. SPK Output Circuit

(b-1) An external dynamic speaker

is evaluated by using J2 (SPK-JACK) connector.

J5

MR-552LS

AOUT

R20

220

2

1

3

R21

20k

+

C28

1u

1

2

AVSS

AVSS

AOUT

Summary of Contents for AKD4633-A

Page 1: ...connector Ordering guide AKD4633 A Evaluation board for AK4633VN Cable for connecting with an USB port and control software is packed with this FUNCTION DIT DIR with optical input output BNC connector...

Page 2: ...SVDD blue 2 6 5 25V for SVDD of AK4633VN typ 3 3V 5 0V VCC orenge 2 6 3 6V for logic typ 3 3V AVSS black 0V for analog ground AGND black 0V for analog ground DGND black 0V for logic ground Each suppl...

Page 3: ...ld be properly selected in order to much the output impedance of the clock generator b Set up jumper pins of BICK clock Output frequency 16fs 32fs 64fs of BICK should be set by BCKO1 0 bit in the AK46...

Page 4: ...o 1 When an external clock through a RCA connector J8 EXT BICK is supplied select EXT on JP21 MCLK_SEL and short JP17 XTE JP23 EXT1 and R26 should be properly selected in order to match the output imp...

Page 5: ...In this evaluation mode the selected clock from JP21 MCLK_SEL is supplied to a divider U3 74VHC4040 BICK and FCK clocks are generated by the divider Input frequency of master clock is set up in turn...

Page 6: ...EXT on JP22 FCK_SEL JP24 EXT2 and R27 should be properly selected in order to match the output impedance of the clock generator c Set up jumper pins of DATA When the AK4633VN is evaluated by loop back...

Page 7: ...order to match the output impedance of the clock generator d Set up jumper pins of DATA When D A converter of the AK4633VN is evaluated by using DIR of AK4114 the jumper pins should be set to the fol...

Page 8: ...order to match the output impedance of the clock generator d Set up jumper pins of DATA When A D converter of the AK4633VN is evaluated by using DIR of AK4114 the jumper pins should be set to the fol...

Page 9: ...TO 0 1 L L L 24bit Left justified 16bit Right justified 1 0 L L H 24bit Left justified 24bit Left justified Default 1 1 H L H 24bit I2 S 24bit I2 S Note When the AK4633VN is evaluated by using DIR DIT...

Page 10: ...s supplied from DVDD jack 5 JP10 LVC_SEL Logic block of LVC is selected supply line DVDD Logic block of LVC is supplied from DVDD Default VCC Logic block of LVC is supplied from VCC jack 6 JP11 VCC_SE...

Page 11: ...atible via a USB control box AKDUSBIF B included in this package The USB control box is connected to a PC with a USB cable and the AKD4633 A with a 10 pin flat cable Note 1 Note 2 Note 1 The AKD4633 A...

Page 12: ...Analog signal is input to MIC pin via J1 connector JP12 MIC_SEL JACK RCA a 2 Analog signal is input to MIC pin via J3 connector JP12 MIC_SEL JACK RCA b BEEP Input Circuit AVSS R19 20k BEEP BEEP 2 3 1...

Page 13: ...open or PMSPK bit in the AK4633VN should be set to 0 SPP SPN 1 2 CN5 R15 10 R17 10 6 4 3 J2 SPK JACK SVSS JP31 Dynamic 020S16 R L SPK1 A K D1 DIODE ZENER SVSS Dynamic EXT Dynamic Piezo EXT JP14 SPP_S...

Page 14: ...uation SPK1 AKM assumes no responsibility for the trouble when using the above circuit examples JP14 SPP_SEL Dynamic Dynamic EXT Piezo EXT JP13 SPN_SEL Dynamic Dynamic EXT Piezo EXT JP31 Dynamic JP14...

Page 15: ...le 3 The USB control is recognized as HID Human Interface Device on the PC 4 Double click the icon akd4633 exe to open the control program Note 3 When the screen does not display AKDUSBIF B at bottom...

Page 16: ...he connection to PC Click this button when connecting USB cable after the control software set up 2 Write Default Register Initialization When the device is reset by a hardware reset use this button t...

Page 17: ...shown on each button Refer to 1 1 Path and Each Setting block Executes a setup of the path or functions Refer to 1 2 Explanation of the color of a pass line Thick lines blue red yellow and sour orang...

Page 18: ...Description Input Output Path MIC ADC Recording_MIC 20dB ALC ON MIC Input Recording AIN SDTO AIN ADC Digi Fil SDTO AIN ADC Recording_AIN 0dB Line Input Recording AIN SDTO AIN ADC Digi Fil SDTO DAC SP...

Page 19: ...ADC Sequential process When MIC ADC button in the main window is clicked the sequence for MIC input Settings is executed Note 4 Figure 10 MIC ADC Setting After Note 4 The function button makes some bl...

Page 20: ...I AKD4633 A KM079407 2016 10 20 1 1 2 AIN ADC Sequential process When AIN ADC button in the main window is clicked the sequence for Analog line input Settings is executed Note 4 Figure 11 AIN ADC Sett...

Page 21: ...I AKD4633 A KM079407 2016 10 21 1 1 3 DAC Speaker Sequential process When DAC SPK button in the main window is clicked the sequence for Speaker output Settings is executed Note 4 Figure 12 DAC SPK Set...

Page 22: ...SEI AKD4633 A KM079407 2016 10 22 1 1 4 DAC AOUT Sequential process When DAC AOUT button in the main window is clicked the sequence for Line output Settings is executed Note 4 Figure 13 DAC AOUT Setti...

Page 23: ...ious Setting Block Input_ADC Setting button Opens Input_ADC dialog box Digital Filter Setting button Opens Filter Setting dialog box ALC Setting Button Opens ALC Setting dialog box DAC_Output Setting...

Page 24: ...bit 1 and ADCPF bit 0 PMPFIL bit 1 PMDAC 1 PMSPK SPPSN When DACS bit 1 or BEEPS bit 1 PMSPK bit 1 and SPPSN bit 1 PMAO AOPS When DACA bit 1 or BEEPA bit 1 PMAO bit 1 and AOPS bit 0 PMBP When MDIF bit...

Page 25: ...mouse operation Button Down indicates 1 and the bit name is shown in red when read only the name is shown in dark red Button Up indicates 0 and the bit name is shown in blue when read only the name is...

Page 26: ...the same address simultaneously Click the Write button located on the right of the each corresponded address for a pop up dialog box When the checkbox next to the bit name is checked the data will be...

Page 27: ...ress check box When the All Address checkbox is checked all register settings will be saved Start Address edit box When the All Address check box is not checked set starts register address to save End...

Page 28: ...ing file assignment mar Close button Closes the dialog box and finish the process All Write flame Executes all register write Selected files are executed in descending order Start button Start the reg...

Page 29: ...t in this dialog box Figure 19 Sequence Window Sequence Setting Set register sequence according to the following process 1 Select a command Use Select pull down box to choose commands Corresponding bo...

Page 30: ...mand are shown below No use None Register Address Data Interval Reg_Mask Address Data Mask Interval Interval Interval Stop None End None Control Buttons Functions of Control Button are shown below DEL...

Page 31: ...ngs Selected files are executed in descending order Stop button Stops the sequence process Help button Opens a help window Save button Saves a sequence setting file assignment The file name is mas Ope...

Page 32: ...interlocked with the settings on register map Refer to the datasheet for register definitions Figure 22 Audio I F Window Gain Control by Slider The volume can also be changed by slider When a value i...

Page 33: ...Figure 24 Filter Setting Window Register Setting button Opens the register setting dialog Register writes of a filter factor are also executed F Response button Opens the frequency response plot dialo...

Page 34: ...1 or 48kHz HPF HPF Cut Off Frequency High Pass Filter cut off frequency 0 0001 fc fs 0 497 2 Band Equalizer EQ1 2 Center Frequency EQ1 2 Center frequency 0 003 fo fs 0 497 EQ1 2 Band Width EQ1 2 Band...

Page 35: ...ed Figure 26 Register Setting for Filter Window Followings are the cases when a register set value is updated 1 When Register Setting button was pushed 2 When F Response button was pushed 3 When Write...

Page 36: ...the graph again Log View check button Switch of Linear Log display Mouse Control of Left Button radio button The item fo Gain which can be adjusted with a mouse can be chosen at using EQx Note 12 fo...

Page 37: ...is operated with the mouse and it is possible to set the filter characteristic on this screen The center frequency and the gain setting are changed by moving the mouse while left clicking Note 12 The...

Page 38: ...the automatic correction function is effective and only EQ of 1 is effective Figure 31 This automatic compensation is effective to EQ which set the gain as 1 Note 12 Note 13 Note 13 There is a possibi...

Page 39: ...x Click the ALC Setting button in the main window to open ALC setting dialog ALC parameters are controlled in this dialog The settings on this dialog are interlocked with the settings on register map...

Page 40: ...ick the DAC Output Setting button in the main window to open DAC setting dialog Output mode DAC and output gain setting are available The settings on this dialog are interlocked with the settings on r...

Page 41: ...KM079404 2 Update Part change in LOGIC circuit diagram U9 74LVC541 74HC541 07 02 15 KM079405 3 Error Correct Port number was corrected in both silkscreen printing and circuit diagram JP1 MICP JP2 MIC...

Page 42: ...d by AKM in writing 3 Though AKM works continually to improve the Product s quality and reliability you are responsible for complying with safety standards and for providing adequate designs and safeg...

Page 43: ...1 TP2 AOUT TP2 AOUT 1 TP22 BICK TP22 BICK 1 AVSS T45_BK AVSS T45_BK 1 SVDD T45_BU SVDD T45_BU JP1 GND JP1 GND 1 TP11 VCOM TP11 VCOM C5 0 1u C5 0 1u R14 10 R14 10 1 2 L5 short L5 short 1 TP12 MCKI TP12...

Page 44: ...AVSS AVSS MIC RCA BEEP AVSS L R 020S16 SPK1 SVSS Dynamic EXT Dynamic Piezo EXT SVSS Dynamic EXT Piezo EXT Dynamic AOUT SVSS JP13 SPN_SEL JP13 SPN_SEL 1 2 C26 1u C26 1u 6 4 3 J1 MIC JACK J1 MIC JACK J...

Page 45: ...1u JP23 EXT1 JP23 EXT1 C36 0 1u C36 0 1u JP20 BICK JP20 BICK D 12 CLK 11 Q 9 Q 8 PR 10 CL 13 U4B 74AC74 U4B 74AC74 C38 open C38 open 1 2 C37 47u C37 47u JP17 XTE JP17 XTE C35 0 1u C35 0 1u JP19 BICK_S...

Page 46: ...IF1 5 NC 6 DIF2 7 IPS1 8 P SN 9 XTL0 10 XTL1 11 TVDD 13 DVSS 14 TX0 15 TX1 16 BOUT 17 COUT 18 UOUT 19 VOUT 20 DVDD 21 DVSS 22 MCKO1 23 BICK 26 MCKO2 27 DAUX 28 XTO 29 XTI 30 PDN 31 CM0 32 CM1 33 OCKS1...

Page 47: ...T4 CTRL PORT4 CTRL C57 0 1u C57 0 1u C55 0 1u C55 0 1u 11 10 U10E 74HC14 U10E 74HC14 R37 470 R37 470 R38 10k R38 10k 9 8 U5D 74HC14 U5D 74HC14 2 1 3 SW2 PDN SW2 PDN 1 2 3 4 5 6 7 8 9 10 PORT3 ROM PORT...

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