44
User’s Guide U3042-90002
U3042AE08
Test Set I/O Interface Commands
Figure 40
Address and Data Example 1 (Port 9 and 10)
Table 13
N5242A PNA-X Source and Receiver Address and Data
Address
Source Path
Receiver Path
Data
1
2
8
16
32
128
0
Ports
1
5
9
1
5
9
16
Ports
3
6
10
3
6
10
32
Ports
4
7
11
4
7
11
64
Ports
2
8
12
2
8
12
U3042AE08
RF Diagram
Solid State Switches
Port 3
(2)
C
A
Port 5
RCVR
C
IN
Port 1
C
P
LR
T
HRU
SO
URC
E
OUT
RCVR
A
IN
CPLR ARM
Agilent 4-Port
PNA
NOTE:
PNA & PNA-X Port orientation is shown. PNA-L RF interconnections are the same.
Port 6
3
4
C
1
2
S100
3
4
C
1
2
S101
Port 9
Port 10
( PNA-L )
SOURCE
SIGNAL
RCVR
SIGNAL
C
P
LR
T
HRU
SO
URC
E
OUT
CPLR ARM
3
4
C
1
2
S200
3
4
C
1
2
S201
Receiver Port
Source Port
DUT
Address.Data Port
0.8
9 Source
16.128
10 Receiver
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