3
PCE-7214 User Manual
Chapter 1
H
ardware
C
onfiguration
1.2
Features
Compliance with PICMG
®
1.3
Support single/dual LGA771 socket Intel
®
Xeon
®
/ LV Xeon
®
FSB 1333 Mhz
processors
Support Dual Channel DDR2 533/667 ECC Registered SDRAM up to 32 GB
Two PCI Express X 8 or one x 16, and One X4 to backplane (Compatible with
Advantech PCE-7000 and PCE-5000 series backplanes)
4 PCI 32bits / 33 MHz masters to backplane
Intel
®
82566DM/82573V Dual Gigabit Ethernet via dedicated PCI Express X1
port
Onboard XGI® Volari® Z11 with 32 MB frame buffer memory
6 SATA HDDs Support S/W SATA RAID 0, 1, 5, 10
8 USB 2.0 ports on CPU card and 4 ones on backplane
Remote management with SNMP-1000-B1 modules
CMOS automatic back and prevent accidental data loss of BIOS setup
1.3
Specifications
1.3.1
System
CPU:
Dual Intel
®
1333 MHz Quad-Core / Dual-Core Xeon
®
or LV Xeon
®
pro-
cessors
L2 Cache:
CPU built-in 12 MB / 6 MB L2 cache
BIOS:
AMI Flash BIOS (32 Mb Flash Memory)
System Chipset:
Intel
®
E5100 + ICH9R
SATA/EIDE hard disk drive interface:
Supports up to 6 independent Serial
ATA hard drives (up to 300 MB/s) with software RAID 0, 1, 5, 10 as well as one
IDE port (maximum 2 devices)
Floppy disk drive interface:
Supports up to two floppy disk drives, 5
1
/
4
(360
KB and 1.2 MB) and/or 3
1
/
2
(720 KB, 1.44 MB). BIOS enabled/disabled.
1.3.2
Memory
RAM:
Up to 32 GB in four 240-pin DIMM sockets. Supports Dual-channel DDR2
533/667 MHz (ECC Registered DIMM).
Note!
PCE-7214 is NOT compatible with DDR2 memory modules that DO
NOT have ECC and register functions. I.E., DDR2 memory modules
MUST have ECC and register functions.
Summary of Contents for PCE-7214
Page 11: ...Chapter 1 1 Hardware Configuration ...
Page 21: ...Chapter 2 2 Connecting Peripherals Jumper Settings ...
Page 33: ...Chapter 3 3 AMI BIOS Setup ...
Page 51: ...Chapter 4 4 Chipset Software Installation Utility ...
Page 56: ...PCE 7214 User Manual 46 ...
Page 57: ...Chapter 5 5 Graphic Setup ...
Page 59: ...Chapter 6 6 LAN Configuration ...
Page 65: ...Chapter 7 7 SATA RAID Setup ...
Page 67: ...Appendix A A Programming the Watchdog Timer ...
Page 75: ...Appendix B B I O Pin Assignments ...
Page 87: ...Appendix C C Programming the GPIO and Watchdog Timer ...