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PAC-4010 User Manual V1.0 Copyright 2016 Advantech Co. Ltd. All rights reserved. Page
105
The available events are specified in
Table 6-18: Processor Sensor Supported Events
Sensor Type
Type
Code
Specific
Offset
Event
Processor
07h
00h
IERR
01h
Thermal Trip
03h
FRB2/Hang in POST failure
0Ah
Processor Automatically Throttled
(PROCHOT)
0Bh
Machine Check Exception (Uncorrectable)
0Ch
Correctable Machine Check Error
A FRB2/Hang in POST failure (offset 03h) event will be generated if the BMC
Watchdog bits with timer use BIOS FRB2. The current BIOS POST code will be logged
in event data 3 for this event in addition (event data byte 1, [7:4] = Ah, OEM code in
Event Data 2 and 3).
For all other supported sensor event offsets, the event data 3 will be unused (FFh,
unspecified). Thus event data byte 1 will be filled with 8h (OEM code in Event Data 2
and unspecified byte 3) for all events other than 03h.
6.4.2.8 Payload System Reset Sensor
The IPMI defined
“System Boot / Restart Initiated”
sensor is available in the SDR.
This sensor is intended to acknowledge about payload system resets and is asserted
with board resets.
The event message for this sensor is filled with following content:
Table 6-19: Reset Sensor Event Data Format
Event Direction Event Data 1
Event Data 2
Event Data 3
[7] =
0b (Assertion)
[7:4] = Fh
(sensor-specific event
extension code in byte
2 and byte 3),
[3:0]: Specific Offset
FFh or reset cause if
specific offset is 07h
(see table below)
FFh or channel
number if specific
offset is 07h
Summary of Contents for PAC-4010
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