Advantech iDAQ-731, User Manual

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23 iDAQ-731_751_763D User Manual
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3.3.2 Instant Digital Input Acquisition
With instant digital input acquisition, the software controls the sample timing. Each
time the software sends a “read instant digital input sample” command, the state of all
digital input channels is sampled as shown in Figure 3.8.
Figure 3.8 Instant digital input acquisition.
3.3.3 Buffered Digital Input Acquisition
With buffered acquisition, a hardware signal called sample clock controls the rate and
time of acquisition as shown in Figure 3.9. The sample clock can be generated inter -
nally on the device or be provided externally. Refer to the device specifications for
supported sample clock sources and the maximum allowable frequency of sample
clock.
Figure 3.9 Digital input buffered (hardware-timed) acquisition.
The acquired samples are first accumulated in the onboard first-in-first-out (FIFO)
memory of the device, and then moved to the buffer in the PC by a direct memory
access (DMA) engine. A buffer is a block of memory in the PC for temporarily storing
the data to be transferred to the application memory. Because the data is moved in
large blocks instead of one point at a time, buffered acquisition typically allow much
higher transfer rates. Buffered acquisition is also called hardware-timed acquisition.
The advantages of buffered acquisition over instant acquisition include:

The sample rate can be much higher.

The time of sample is deterministic.

Hardware triggers can be used.