ADLINK Technology NuDAQ DAQ-2500 Series User Manual Download

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Calibration

This chapter introduces the calibration process to minimize AD meas-
urement errors and DA output errors.

DAQ/PXI-2500 SERIES is factory calibrated before shipment. The on-
board high precision band-gap voltage reference together with TrimDAC
compensates for unwanted offsets and gain errors, caused by environment
variation or component aging.

Summary of Contents for NuDAQ DAQ-2500 Series

Page 1: ...uy your excess underutilized and idle equipment along with credit for buybacks and trade ins Custom engineering so your equipment works exactly as you specify Critical and expedited services Leasing R...

Page 2: ...NuDAQ DAQ 2500 PXI 2500 Series High Performance Analog Output Multi function Cards User s Guide Recycled Paper...

Page 3: ......

Page 4: ...s arising out of the use or inability to use the product or documentation even if advised of the possibility of such damages This document contains proprietary information protected by copyright All r...

Page 5: ...com Technical Support NuPRO EBC nupro adlinktech com TEL 886 2 82265877 FAX 886 2 82265717 Address 9F No 166 Jian Yi Road Chungho City Taipei 235 Taiwan Please inform or FAX us of your detailed infor...

Page 6: ...tiveX Controls 8 Chapter 2 Installation 9 2 1 Contents of Package 9 2 2 Unpacking 10 2 3 DAQ PXI 2500 SERIES Layout 11 2 4 PCI Configuration 12 Chapter 3 Signal Connections 13 3 1 Connectors Pin Assig...

Page 7: ...37 4 4 2 1 Mode1 Simple Gated Event Counting 38 4 4 2 2 Mode2 Single Period Measurement 38 4 4 2 3 Mode3 Single Pulse width Measurement 39 4 4 2 4 Mode4 Single Gated Pulse Generation 39 4 4 2 5 Mode5...

Page 8: ...analog trigger condition 45 4 6 Timing Signals 46 4 6 1 System Synchronization Interface 47 Chapter 5 Calibration 48 5 1 Auto calibration 49 5 2 Saving Calibration Constants 49 5 3 Loading Calibration...

Page 9: ...s and specifications Chapter 2 Installation describes how to install the DAQ PXI 2500 SERIES cards The layout and positions of all the connectors on the DAQ PXI 2500 SERIES are also shown Chapter 3 Si...

Page 10: ...500 SERIES advanced analog output cards provide the following advanced features 32 bit PCI PXI Bus plug and play Up to 1MS s analog output rate Up to 400KS s analog input rate Up to 8 analog output ch...

Page 11: ...D A Data transfer software update and bus mastering DMA with Scatter Gather A D trigger modes post trigger delay trigger with re trigger functionality D A outputs with waveform generation capability...

Page 12: ...r Voltage reference internal 10V or external up to 10V Output range Bipolar 10V or external reference Unipolar 0 10V or 0 external reference Settling time for 10 10V step 2 s Slew rate 20V s Output co...

Page 13: ...trigger middle trigger and delay trigger Data transfers Programmed I O and bus mastering DMA with scat ter gather Input coupling DC Offset error Before calibration 40mV max After calibration 1mV max G...

Page 14: ...ernal Resolution 8 bits Slope Positive or negative software selectable Hysteresis Programmable Bandwidth 400khz External Analog Trigger Input EXTATRIG Impedance 40K Coupling DC Protection Continuous 3...

Page 15: ...er Requirement 5VDC 1 6A typical Operating Environment Ambient temperature 0 to 55 C Relative humidity 10 to 90 non condensing Storage Environment Ambient temperature 20 to 70 C Relative humidity 5 to...

Page 16: ...atible across Windows 98 Windows NT and Windows 2000 XP This means all applications developed with D2K DASK are compatible across Windows 98 Windows NT and Windows 2000 XP The developing environment c...

Page 17: ...package to install these drivers In addition ADLINK supplies an ActiveX control software DAQBench DAQBench is a collection of ActiveX controls for measurement or auto mation applications With DAQBench...

Page 18: ...n use software utility PCI_SCAN EXE to read the system configuration 2 1 Contents of Package In addition to this User s Guide the package should include the following items DAQ PXI 2500 SERIES Multi f...

Page 19: ...mages Shipping and han dling may cause damage to your module Be sure there are no shipping and handling damages on the modules carton before continuing After opening the card module carton extract the...

Page 20: ...Installation 11 2 3 DAQ PXI 2500 SERIES Layout Figure 2 2 PCB Layout of DAQ 2502 2501 Figure 2 3 PCB Layout of PXI 2502 2501...

Page 21: ...asis for all PCI boards on your system Because configuration is controlled by the system and software there is no jumper setting required for base address DMA and interrupt IRQ The configuration is su...

Page 22: ...etween DAQ PXI 2500 SERIES and external devices 3 1 Connectors Pin Assignment DAQ PXI 2500 SERIES is equipped with two 68 pin VHDCI type con nectors AMP 787254 1 It is used for digital input output an...

Page 23: ...GND AO_TRIG_OUTA 13 47 EXTWFTRG_A AO_TRIG_OUTB 14 48 EXTWFTRG_B GPTC1_SRC 15 49 VCC GPTC0_SRC 16 50 DGND GPTC0_GATE 17 51 GPTC1_GATE GPTC0_OUT 18 52 GPTC1_OUT GPTC0_UPDOWN 19 53 GPTC1_UPDOWN RESERVED...

Page 24: ...4 7 15 16 GPTC 0 1 _SRC DGND Input Source of GPTC 0 1 17 51 GPTC 0 1 _GATE DGND Input Gate of GPTC 0 1 18 52 GPTC 0 1 _OUT DGND Input Output of GPTC 0 1 19 53 GPTC 0 1 _ UPDOWN DGND Input Up Down of G...

Page 25: ...ries of the DAQ PXI 2500 series are described in this chapter The functions include A D conversion D A conversion Digital I O and General Purpose Counter Timer This operation theory will help you unde...

Page 26: ...Operation Theorem 17...

Page 27: ...the acquired 14 bit A D data is 2 s Complement coding Table 4 1 1 and 4 1 2 lists the valid input ranges and the ideal transfer characteristics Magnitude Bipolar Input Range Digital code FSR 10V 5V 2...

Page 28: ...l of the multiple channels is defined by the SI2_counter Please refer to Table 4 1 4 for more information DAQ PXI 2500 series can sample multiple channels in continu ous discontinuous ascending sequen...

Page 29: ...mpling Interval which defines the interval between each sampled channel Sampling Interval SI2_counter Timebase PSC_counter 24 bit Post Scan Counts which defines how many scans to be performed with re...

Page 30: ...4 1 3 2 Trigger Mode Post Trigger Acquisition Use post trigger acquisition when users want to perform scans right after a trigger signal The number of scans to be performed after the trigger signal is...

Page 31: ...trates an example Two scans are performed after the first trigger signal and then wait for the next trigger signal When the trigger signal occurs it performs 2 more scans When re trigger function is d...

Page 32: ...rogress Acquired stored data 6 scans Operation start Trigger Figure 4 1 4 Post trigger with retrigger 4 1 4 4 Bus mastering DMA Data Transfer Bus Mastering DMA Mode In order to utilize the maximum PCI...

Page 33: ...r gather or chaining mode to link non continuous memory blocks into a linked list so that users can transfer large amounts of data without being limited by the fragment of memory blocks Users can conf...

Page 34: ...nels are packed into one D A group i e DAQ PXI 2502 contains two D A groups and DAQ PXI 2501 has only one D A group Figure 4 2 1 Block Diagram of D A Group Group B of DAQ PXI 2502 is identical to Grou...

Page 35: ...re 4 2 2 Data Format in FIFO and mapping With hardware based Waveform Generation D A conversions are updated automatically by CPLD rather than application software Unlike the con ventional Software ba...

Page 36: ...reference from the external source The external reference is fed thru an on board calibrated circuit with programmable offset Users can utilize this capability to generate precise D A outputs CAUTION...

Page 37: ...aveforms at a precise and fixed rate Various programmable counters will facilitate users to generate complex waveforms with great flexibility There are three event signals involved in Waveform Generat...

Page 38: ...ler than the size of waveform pat terns the waveform is generated piece wisely IC_counter 16 bit Iteration Counts which defines how many times the waveform is gener ated DLY1_counter 16 bit Define the...

Page 39: ...LY2_Counter reaches 0 Output Waveform Delay until DLY2_Counter reaches 0 0 2 4 4 A single waveform UC_Counter 4 IC_Counter 3 Figure 4 2 3 Typical D A timing of waveform generation Assuming the data in...

Page 40: ...forms with respect to multiple incoming trigger signals Users can set Trig_counter to specify the number of acceptable trigger signals Figure 4 2 6 illustrates an example Two waveforms are generated a...

Page 41: ...n Users can setIC_counter to generate iterative waveforms no matter which Trigger Mode is used The IC_counter stores the iteration number Ex amples are shown in Figure 4 2 7 and 4 2 8 When IC_counter...

Page 42: ...ll be a 2 cycle sine wave for every waveform period In conjunction with different trigger modes and counter setups users can manipulate a single waveform to generate different more complex wave forms...

Page 43: ...1 or analog trigger Three stop modes are provided to stop finite or infinite waveform generation Stop Mode I After a mode I stop trigger is asserted the waveform generation stops immediately Figure 4...

Page 44: ...the data in the data buffer are 2V 4V 2V 0V UC _Counter 4 IC_Counter disabled 4 update counts infinite iterations DAWR WFG_in_progress Operation start Trigger Output Waveform 0 2 4 stop trigger Figure...

Page 45: ...ine GPIO are separated into three ports Port A Port B and Port C High nibble bit 7 4 and low nibble bit 3 0 of each port can be indi vidually programmed to be either inputs or outputs Upon system star...

Page 46: ...OWN The GPTC_CLK input acts as a clock source to the timer counter Active edges on the GPTC_CLK input increment or decrement the counter The GPTC_UPDOWN input determines whether the counter s counting...

Page 47: ...5 4 3 2 1 1 0 ffff Gate CLK Count value Software start Figure 4 4 1 Mode 1 Operation 4 4 2 2 Mode2 Single Period Measurement In this mode the counter counts the period of the signal on GPTC_GATE in t...

Page 48: ...here initial count 0 in up counting mode 0 0 1 2 3 4 5 5 5 Gate CLK Count value Software start Figure 4 4 3 Mode 3 Operation 4 4 2 4 Mode4 Single Gated Pulse Generation This mode generates a single pu...

Page 49: ...f two and pulse width of four 2 2 1 0 3 2 1 0 Gate CLK Count value OUT Software start Figure 4 4 5 Mode 5 Operation 4 4 2 6 Mode6 Re triggered Single Pulse Generation This mode is similar to mode 5 ex...

Page 50: ...pulse delay of four and pulse width of three 4 4 4 3 2 1 0 2 1 Software start 0 3 2 1 0 2 1 0 3 2 Gate CLK Count value OUT Figure 4 4 7 Mode 7 Operation 4 4 2 8 Mode8 Continuous Gated Pulse Generatio...

Page 51: ...A D and D A processes can receive an individual software trigger 4 5 2 External Analog Trigger The analog trigger circuitry routing is shown in the Figure 4 5 1 The analog multiplexer selects either...

Page 52: ...s in DAQ PXI 2500 SERIES DAQ PXI 2500 SERIES uses 2 threshold voltages Low_Threshold and High_Threshold to compose 5 different trigger conditions Users can con figure the trigger conditions easily via...

Page 53: ...tage The Low_Threshold setting is not used in this trigger condition Figure 4 5 3 Above High analog trigger condition 4 5 2 3 Inside Region analog trigger condition Figure 4 5 4 shows the inside regio...

Page 54: ...steresis region is determined by the Low_Threshold voltage Figure 4 5 5 High Hysteresis analog trigger condition 4 5 2 5 Low Hysteresis analog trigger condition Figure 4 5 6 shows the low hysteresis a...

Page 55: ...als related to the DAQ timing which in turn influ ence the A D D A process and GPTC operation These signals are fed through the Auxiliary Function Inputs pins AFI or the System Synchro nization Interf...

Page 56: ...tions between boards You can choose each of the 7 timing signals and which board to be the SSI master The SSI master can drive the timing signals of the slaves Users can thus achieve better synchroniz...

Page 57: ...mize AD meas urement errors and DA output errors DAQ PXI 2500 SERIES is factory calibrated before shipment The on board high precision band gap voltage reference together with TrimDAC compensates for...

Page 58: ...ers pe riodically calibrate the DAQ board The user calibration constants can also be stored in the on board EEPROM NOTE 1 Before auto calibration procedure starts it is recommended to warn up the boar...

Page 59: ...orm we suggest using hardware capabilities to maximize both effi ciency and flexibility Standard Function Waveforms including sine wave trian gular wave saw wave ramp etc can be converted to Waveform...

Page 60: ...rmedi ate space determined by DLY2_counter Piece wise Generation When the value specified in UC_counter is smaller than the sample size of waveform the waveform is generated piece wisely The intermedi...

Page 61: ...ted FM waveform Since all four channels are synchronized in a D A group precise quadrature waveform generation is guarantied provided the waveform are shifted 90 degree for the other channel Phase dif...

Page 62: ...Local warranty conditions will depend on the local dealers 3 Our repair service does not cover two year guarantee while dam ages are caused by the following a Damage caused by not following instructi...

Page 63: ...dlinktech com Damaged products with RMA forms at tached receive priority For further questions please contact our FAE staff ADLINK service adlinktech com Test Measurement Product Segment NuDAQ adlinkt...

Page 64: ...uipment Have surplus equipment taking up shelf space We ll give it a new home Learn more Visit us at artisantg com for more info on price quotes drivers technical specifications manuals and documentat...

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