ADLINK Technology LittleBoard 735, Reference Manual

Page: 38 / 54

Chapter 3 Hardware
32 Reference Manual LittleBoard 735
Video Interfaces
The 82945GSE chip provides the graphics control and video signals to the traditional glass CRT monitors
and LCD flat panel displays. The chip features are listed below:
CRT features:
•
Support for an integrated 400-MHz, 24-bit RAMDAC to drive a progressive scan analog monitor and
outputs to three, 8-bit DACs that provide the R, G, and B signals to the monitor
•
Support for resolutions up to QXGA (2048x1536)
•
Support for a maximum allowable video frame buffer size of 224MB UMA (Unified Memory
Architecture)
LVDS Flat Panel features:
•
Support for an integrated dual channel LFP Transmitter interface
•
Support for LVDS LCD panel resolutions up to UXGA(1600X1200)
•
Support for a maximum pixel format of 18 bpp with SSC supported frequency range from 25 MHz to
112 MHz (single channel/dual channel)
TV Out features:
•
Support for three integrated 10-bit DACS
•
Support for overscaling
•
Provide NTSC/PAL
•
Provide component, s-video, and composite output interfaces
•
Support HDTV: 480p/720p/1080i/1080p
CRT Interface
Table 3-14 describes the pin signals of the CRT interface, which uses 12 pins, 2 rows, odd/even sequence (1,
2) with 0.079" (2mm) pitch.
Note: The shaded areas denote power or ground.
Table 3-14. CRT Interface Pin Signals (J3)
Pin # Signal Description
1 RED Red – This is the Red analog output signal to the CRT.
2 GND Ground (Red Return)
3 GREEN Green – This is the Green analog output signal to the CRT.
4 GND Ground (Green Return)
5 BLUE Blue – This is the Blue analog output signal to the CRT.
6 GND Ground (Blue Return)
7 HSYNC Horizontal Sync – This signal is used for the digital horizontal sync output
to the CRT.
8 GND Ground
9 VSYNC Vertical Sync – This signal is used for the digital vertical sync output to
the CRT.
10 PWR Power – Provided through fuse (F1) to +5 volts +/- 5%. F1 is next to J3
connector on board.
11 SDA DDC (Display Data Channel) Data
12 SCL DDC (Display Data Channel) Clock