ADCMT 6240B, Operation Manual

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6240B DC Voltage Current Source/Monitor Operation Manual
5.2.16 Self Test
5-71
45 221
Low Limit 300 mV +FS LL 0.3V +FS
b
256
46 222 Low Limit 300 mV -FS LL 0.3V -FS 512
47 223 Low Limit 3 V +FS LL 3V +FS 1024
48 224
Low Limit 3 V -FS LL 3V -FS
2048
53 225 Low Limit 15 V +FS LL 15V +FS 4096
54 226 Low Limit 15 V -FS LL 15V -FS 8192
55 231 IM 30

A ZERO IM 30

A Zero
d
1
56 232
IM 300

A ZERO IM 300

A Z
2
57 233 IM 3 mA ZERO IM 3mA Zero 4
58 234 IM 30 mA ZERO IM 30mA Zero 8
59 235
IM 300 mA ZERO IM 300mA Z
16
62 236 IM 1 A ZERO IM 1A Zero 32
64 237 IM 4 A ZERO IM 4A Zero 64
65 241
ISIM 30

A +FS IS 30

A +FS
e
1
66 242 ISIM 30

A -FS IS 30

A -FS 2
67 243 ISIM 300

A +FS IS 300

A +FS 4
68 244
ISIM 300

A -FS IS 300

A -FS
8
69 245
ISIM 3 mA +FS IS 3mA +FS
16
70 246 ISIM 3 mA -FS IS 3mA -FS 32
71 247 ISIM 30 mA +FS IS 30mA +FS 64
72 248
ISIM 30 mA -FS IS 30mA -FS
128
73 249 ISIM 300 mA +FS IS 300mA +FS 256
74 250 ISIM 300 mA -FS IS 300mA -FS 512
79 251 ISIM 1 A +FS IS 1A +FS 1024
80 252 ISIM 1A -FS IS 1A -FS 2048
83 253 ISIM 4 A +FS IS 4A +FS 4096
84 254 ISIM 4A -FS IS 4A -FS 8192
85 301 OVL detection check OVL Check
d
256
86 311 Sample hold check S/H Check 512
87 - All the panels light ON Visual check
- -
88 -
Buzzer Buzzer sound check
89 - Panel key Visual check
(*1) TER? command response register and data
In the error register (ERR?) the following bits are set.
• At power ON;
bit 0
• In executing the self-test; bit 1
Table 5-19 Self-Test Items (2/2)
Error code Description
Execution method
Message
TER register (*1)
Power ON *TST?
Key
operation
Register Data