SERIES IOS-521 I/O SERVER MODULE EIA/TIA-422B SERIAL COMMUNICATION MODULE
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4.0 THEORY OF OPERATION
This section contains information regarding theTIA/EIA-422B
serial data interface. A description of the basic functionality of
the circuitry used on the board is also provided. Refer to the IOS-
521 BLOCK DIAGRAM as you review this material.
EIA/TIA-422B SERIAL INTERFACE
The Electronic Industries Association (EIA) in conjunction
with the Telecommunication Industries Association (TIA)
introduced TIA/EIA-422B as a balanced (differential) serial data
transmission interface standard between Data Terminal
Equipment (DTE) and Data Communication Equipment (DCE).
By definition, DTE is commonly used to represent the data
source, data sink, or both. DCE is used to represent the devices
used to establish, maintain, and terminate a connection, and to
code/decode the signals between the DTE and the transmission
channel. Most computers are considered DTE devices, while
modems are DCE devices.
The EIA/TIA-422B interface is the second revision of this
standard and specifies a balanced driver with balanced receivers.
Balanced data transmission refers to the fact that only two
conductors are switched per signal and the logical state of the
data is referenced by the difference in potential between the two
conductors, not with respect to signal ground. The differential
method of data transmission makes EIA-422B ideal for noisy
environments since it minimizes the effects of coupled noise and
ground potential differences. That is, since these effects are
seen as common-mode voltages (common to both lines), not
differential, they are rejected by the receivers. Additionally,
balanced drivers have generally faster transition times and allow
operation at higher data rates over longer distances.
The EIA/TIA-422B standard defines a unidirectional,
terminated, single driver and multiple receiver configuration. By
providing a separate data path for transmit and receive, full-
duplex operation is accomplished. The maximum data
transmission cable length is generally limited to 4000 feet without
a signal repeater installed.
EIA/TIA-422B is electrically similar to EIA-485, except that
EIA-485 supports multiple driver operation. Consequently, this
board may be used to implement a full-duplex EIA-485 interface
(see RS422/RS485 INTERFACE DIAGRAM). However, for true
half-duplex EIA-485 operation, please see the Acromag Model
IOS-502.
With respect to EIA/TIA-422B, logic states are represented
by differential voltages from 2V to 10V. The polarity of the
differential voltage determines the logical state. A logic 0 (the
„space‟ or OFF state) is represented by a positive differential
voltage between the terminals (measured A to B, or + to -). A
logic 1 (the „mark‟ or ON state) is represented by a negative
differential voltage between the terminals (measured A to B, or +
to -
). Note that at the interface, a logic „0‟ is represented by a
positive voltage, and a logic „1‟ by a negative voltage. The line
receivers convert these signals to the conventional TTL level
associations.
EIA/TIA-
422B
BINARY 0
(SPACE/OFF)
BINARY 1
(MARK/ON)
SIGNAL
A to B
(+) to (-)
Positive
Differential Voltage
Negative
Differential Voltage
Start and stop bits are used to synchronize the DCE to the
asynchronous serial data of the DTE. The transmit data line is
normally held in the mark state (logical 1). The transmission of a
data byte requires that a start bit (a logical 0 or a transition from
mark to space) be sent first. This tells the receiver that the next
bit is a data bit. The data bits are followed by a stop bit (a logical
1 or a return to the mark state). The stop bit tells the receiver
that a complete byte has been received. Thus, 10 bits make up a
data byte if the data character is 8 bits long (and no parity is
assumed). Nine bits are required if only standard ASCII data is
being transmitted
(1 start bit + 7 data bits + 1 stop bit). The character size for this
module is programmable between 5 and 8 bits.
Parity is a method of judging the integrity of the data. Odd,
even, or no parity may be configured for this module. If parity is
selected, then the parity bit precedes transmission of the stop bit.
The parity bit is a 0 or 1 bit appended to the data to make the
total number of 1 bits in a byte even or odd. Parity is not
normally used with 8-bit data. Even parity specifies that an even
number of logical 1‟s be transmitted. Thus, if the data byte has
an odd number of 1‟s, then the parity bit is set to 1 to make the
parity of the entire character even. Likewise, if the transmitted
data has an even number of 1‟s, then the parity bit is set to 0 to
maintain even parity. Odd parity works the same way using an
odd number of logical 1‟s.
Thus, both the DTE & DCE must have the same parity. If a byte
is received that has the wrong parity, an error is assumed and the
sending system is typically requested to retransmit the byte. Two
other parity formats not supported by this module are mark and
space parity. Mark parity specifies that the parity bit will always
be a logical 1, space parity requires that the parity bit will always
be 0.
The most common asynchronous serial data format is 1 start
bit, 8 data bits, and 1 stop bit, with no parity. The following table
summarizes the available data formats:
START BIT
Binary 0 (a shift from “Mark” to “Space”)
DATA BITS
5,6,7, or 8 Bits
PARITY
Odd, Even, Stick, or None
STOP BIT
Binary 1 (1, 1-1/2, or 2 Bit times)
With start, stop, and parity in mind, for an asynchronous data
byte, note that at least one bit will be a 1 (the stop bit). This
defines the break signal (all 0 bits with a 1 stop bit lasting longer
than one character). A brea
k signal is a transfer from “mark” to
“space” that lasts longer than the time it takes to transfer one
character. Because the break signal doesn‟t contain any logical
1‟s, it cannot be mistaken for data. Typically, whenever a break
signal is detected, the receiver will interpret whatever follows as a
command rather than data. The break signal is used whenever
normal signal processing must be interrupted. In the case of a
modem, it will usually precede a modem control command. Do
not confuse the break signal with the ASCII Null character, since
