Acer ZX4830 Series, Service Manual

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Chapter 1 13
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Intel I/O Virtualization (VT-d) Support
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Intel Trusted Execution Technology (Intel TXT) Support (Corporate Only)
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Power Management Logic
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Support ACPI 3.0b
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ACPI- defined power states (C1,C2,C3,C4,S1,S3,S4,S5)
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ACPI Power Management Timer
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SMI# generation
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All registers readable/restorable for proper resume from 0 V suspend states
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Support for APM-based legacy power management for non-ACPI implementations
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External Glue Integration
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Integrated Pull-up, Pull-down and Series
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Termination registers on processor I/F
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Integrated Pull-down and Series resisters on USB
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Enhanced DMA Controller
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Two cascaded 8237 DMA controllers
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Support LPC DMA
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SMBus
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Faster speed, up to 100 kbps
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Flexible SMBus/SMLink architecture to optimize for ASF
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Provides independent manageability bus through SMLink interface
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Supports SMBus 2.0 Specification
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Host interface allow processor to communication via SMBus
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Slave interface allows an internal or external Microcontroller to access System
resources
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Compatible with most two-wire components that are also I2C compatible
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High Precision Event Timer
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a. Advanced operating system interrupts scheduling
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Timers Based on 82C54
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System timer, Refresh request, Speaker tone output
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Real Time Clock
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256 Byte battery-backed CMOS RAM
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Integrated oscillator components
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Lower Power DC/DC Converter implementation
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System TCO Reduction Circuits
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Timers to generate SMI# and Reset upon detection of system hang
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Timers to detect improper processor reset
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Integrated processor frequency strap logic
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Supports ability to disable external devices
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Supports Processor System Bus interrupt delivery
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Interrupt Controller
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Support up to eight PCI interrupt pins
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Support PCI 2.3 Message Signalled Interrupts
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Two cascaded 82C59 with 15 interrupts
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Integrated I/O APIC capability with 24 interrupts
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1.1V operation with 1.5V and 3.3V I/O
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5V tolerant buffers on PCI, USB and selected Legacy signals
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1.1V Core Voltage
Item Specification
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