Number of
hops in
network
Internal
application
delay (µs)
(50Hz)
Internal
switch
delay (µs)
Store and
forward
latency (µs)
Queue
latency
(µs)
1)
Additional
tolerance
(µs)
2)
Theoretical
max delay
(µs)
Recommen
ded max
delay
setting (µs)
20
1746
200
240
2400
350
4936
4400
25
1746
250
300
3000
400
5696
5650
30
1746
300
360
3600
450
6456
5650
1) Queue latency calculated when the port has started to send a full-sized frame (1500 bytes) before the
SMV frame and the switch has been configured to prioritize SMV
2) Additional tolerance in case of long wires or disturbance in network
Table 10:
Protection delays and network margins
SMV Max Delay setting 50 Hz
(ms)
Ethernet network margin 50 Hz
(ms)
1)
Protection delay 50 Hz (ms)
1.90
0.25
1.25
3.15
1.5
2.5
4.40
2.75
3.75
5.65
3
5
6.90
4.25
6.25
1) Average values, variation is ±0.1 ms
6.4.5
IEEE 1588 v2 parameters and status information
Time
The time parameters are found via menu path
Configuration/Time.
.
Table 11:
Time parameters
Parameter
Value
Range
Synch source
IEEE 1588
PTP Domain ID
0
0...255
PTP priority 1
1)
128
0...255
PTP priority 2
1)
128
0...255
1) Smaller value has higher priority
In IEEE 1588 v2, the PTP domain is a logical grouping of clocks that synchronize to
each other using the protocol but that are not necessarily synchronized to clocks in
another domain.
PTP priority 1
and
PTP priority 2
are used in the execution of the best master clock
algorithm in which lower values take precedence. Priority 1 is the first one used to
decide the clock master.
Section 6
1MRS757809 C
Process bus and IEEE 1588 time synchronization
74
REC615 and RER615
Engineering Guide
