ABB REG650 ANSI, Commissioning Manual

Page: 99 / 144

6.7.2 Overfrequency protection SAPTOF
Prepare the IED for verification of settings as outlined in 5.1 "Preparing the IED to
verify settings" .
Values of the logical signals for SAPTOF are available on the local HMI under Main
menu/Tests/Function status/Frequency/SAPTOF(81,f>)/SAPTOF:X . The Signal
Monitoring in PCM600 shows the same signals that are available on the local HMI.
6.7.2.1 Verifying the settings
Verification of START value and time delay to operate
1. Check that the IED settings are appropriate, for example the start value and the
time delay.
2. Supply the IED with three-phase voltages at their rated values and initial
frequency.
The initial frequency is calculated using Equation
36 .
0.02 / 0.04 0.04
r
StartFrequency floor f StartFrequency
 
 
   
IECEQUATION16061 V1 EN
(Equation 36)
[2]
3. Slowly increase the voltage frequency by steps of 40 mHz until the START
signal appears; during each step apply the voltage signal for a time that is either
at least 10% longer than (
tDelay +100 ms) or a suitable time to monitor the
function.
4. Note the frequency value at which the START signal appears and compare it
with the set value
StartFrequency .
5. Decrease the frequency until its rated value is reached.
6. Check that the START signal resets.
7. Supply the IED with three-phase voltages at their rated values and frequency 20
mHz under the set value
StartFrequency .
8. Increase the frequency with a 40 mHz step, applying it for a time that is at least
10% longer than (
tDelay +100 ms).
9. Measure the time delay of the TRIP signal, and compare it with the set value
tDelay . Note that the measured time consists of the set value of the time delay
plus the minimum operate time of the function (80 - 90 ms).
Extended testing
[2] floor[
x] is the largest integer less than or equal to x
1MRK 502 049-UEN A
Section 6
Testing functionality
91
Commissioning manual