10. Parallel I/O
ÛZIATECH
66
Debounce Duration Register (Ports 4-5)
This register controls the duration required by each input signal before it is recognized
for ports 4 and 5. The debounce times available are 4 µs, 64 µs, 1 ms, and 8 ms. A
debounce value of 00 sets 4 µs, 01 sets 64 µs, 10 sets 1 ms, and 11 sets 8 ms. This
register controls ports 4 and 5. The default value is 00 for a 4 µs debounce period.
Parallel Port Debounce Duration Register (Ports 4-5)
0
1
2
3
4
5
6
7
Register: Debounce Duration
Mode: Enhanced (Bank 2)
Address: E2h
Access: Read and Write
Duration
00 4 microseconds
01 64 microseconds
10 1 milliseconds
11 8 milliseconds
Port 5
Port 4
ZT 8907
Debounce Clock Register
This bit must be set to a 1 to use the debounce feature. The default value is 0. A read
from this port is undefined.
Parallel Port Debounce Clock Register
0
1
2
3
4
5
6
7
Register: Debounce Clock
Mode: Enhanced (Bank 2)
Address: E3h
Access: Write
Debounce Clock Select
0 No clock
1 8 MHz clock
CLK
ZT 8907
