Yamaha DPX-530, Руководство по обслуживанию

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57
DPX-530
DPX-1200DPX-530
IC6L0 SiI169CT100
2:1
A/D
8
8
8
R 0
AIN
R 1
0
1
AIN
R
OUTA
R
OUTB
2:1
A/D
8
8
8
G
IN
G
OUTA
G
IN
0
1
B
IN
B
IN
G
OUTB
2:1
A/D
8
8
8
B
OUTA
B
OUTB
2:1
HSYNC1
HSYNC0
2:1
VSYNC1
VSYNC0
2:1
SOGIN0
SOGIN1
COAST
CLAMP
CKINV
CKEXT
FILT
SCL
SDA
A0
REF
BYPASS
DATACK
HSOUT
VSOUT
SOGOUT
2
5
8
13
17
20
23
43
45
42
44
12
16
53
30
29
54
50
32
31
33
113-120
104-110
90-97
80-87
70-77
57-64
123,124
125
127
126
2
MUX
MUX
MUX
MUX
MUX
MUX
SERIAL REGISTER
AND
POWER MANAGEMENT
REF
SYNC
PROCESSING
AND
CLOCK
GENERATION
CLAMP
CLAMP
CLAMP
IC6A0 AD9883AKST-110
Configuration Logic
HDCP
Decryption
Engine
HDPC
Kyes
EEPROM
Registers
--------------
I2C
Slave
Panel Link
TMDS
DIGITAL
Core
XOR
Mask
Panel
Interface
Logic
24
encrypted
data
unencrypted
data
24
control
CTL3
QE{23:0}
QO{23:0}
ODCK
DE
HSYNC
VSYNC
SCDT
SCLS
SDAS
RXC+
RX0+
RX1+
RX2+
EXT_RES
ST
A
G
_O
UT
PIXS
OCK_INV HS_DJTR RESET# PD#
PDO#
100
3
93,94
90,91
42
10 -17, 20 -27, 30 -37
44
46
48
47
9
49-56, 59-66
7 4 41 40 1
2 9
85,86
80,81
96