Yamaha CD-S300, Руководство по обслуживанию

Страница: 28 / 57

28
CD-S300
CD-S30
0
R0H
Timers
Port P0
8
Port P6
8
Port P7
8
Port P8
8
Port P9
4
8 8 8 3 2 8
Port P1 Port P2 Port P3 Port P4 Port P5
System clock
generation circuit
XIN-XOUT
High-speed on-chip oscillator
Low-speed on-chip oscillator
XCIN-XCOUT
UART or
clock synchronous serial I/O
(8 bits x 3)
I
2
C bus or SSU
(8 bits x 1)
LIN module
Watchdog timer
(15 bits)
A/D converter
(10 bits x 20 channels)
D/A converter
(8 bits x 2)
Timer RA (8 bits x 1)
Timer RB (8 bits x 1)
Timer RC (16 bits x 1)
Timer RD (16 bits x 2)
Timer RE (8 bits x 1)
Timer RF (16 bits x 1)
R8C/Tiny Series microprocessor core Memory
I/O ports
Peripheral functions
R0L
R1H R1L
R2
SB
INTB
PC
USP
ISP
FLG
ROM
(1)
RAM
(2)
Multiplier
NOTES:
1. ROM size varies with MCU type.
2. RAM size varies with MCU type.
R3
A0
A1
FB
EEP_WP
EEP_SDA
DAC_/CS
DAC_SCL
DAC_SDA
OCD_MODE
/AMUTE
ABUS_SW
RESET
XOUT
VSS/AVSS
XIN
VCC/AVCC
232C_PCON
IR
FL_/RST
FL_CLK
FL_DATA
FL_CS
CLSW
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
KEY_2 KEY_1 KEY_0 POFF_detect KEY_PLAY KEY_USB KEY_O/C SUB_READY0 REG_READY0 DSP_/RST DSP_CE TxD2 RxD2 CLK2 232C_RX 232C_TX CD_MUTE DOUT_MUTE TBL_R TBL_L
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
CL_UP
CL_DOWN
OPEN
CLOSE
RIN2
DOUT2
USB_TX
USB_RX
USB_/RST
C2_Flag
CANCEL
USB_IN
iPod_IF
HSW_/EN
HSW_/FLG
USB_PCON
TBL_POS
UPSW
DOWNSW
OPSW
D33_Detect
OPU_SEL
DRV_MUTE
LIMIT_SW
MON_1
MON_2
N.C.
N.C.
N.C.
LED_POWER
LED_PDIRECT
LED_/USB1
LED_/USB2
N.C.
VSS/AVSS
SLED_CTL
VREF
VCC/AVCC
STBY
EEP_SCL
IC305
R5F212CASNFP
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
IC305: R5F212CASNFP (MAIN P.C.B.)
Single chip 16-bit microprocessor