AHIP-370 Manual
14
Configuration Options
Jumpers
The following tables list AHIP-370 jumpers, their default positions and their func-
tions. The jumpers marked “Access” are placed at the top of the board for easy cus-
tomer access.
Table 2-1. AHIP-370 Jumpers
Jumper
Position
Function
J1
A
B
Push button reset switch DISABLED (Access)
Push button reset switch ENABLED
J2
A
B
CMOS OK (Access)
Clear CMOS
J3
A
B
Flat panel selected (Access)
CRT selected
J4
A
B
Normal
Program the H8
J7
A
B
Boot flash enabled
Boot ROM enabled
J8
A
B
Enables RS-485 port in the assertive state.
Enables RS-485 port in the negated state.
J9
A
B
DTR used to control the RS-485 port
RTS used to control the RS-485 port
J18
A
B
VGA ENABLED
VGA DISABLED
The BIOS recovery scheme used on the AHIP6 utilizes a jumper (J5) to select recov-
ery mode. The Flash Programmable Gate Array (FPGA) at U15 uses this to define
the state of address signal A18 into the flash chip. According to the following table:
J5*
Mode
Flash A18 state
A
Normal
Inverted
B
Recovery
Not Inverted
*Recent changes in flash technology have mandated that J5 be in the B position for
normal operation. This is confusing, as it is contrary to the design documentation
and user manual. Because of this, J5 has been eliminated on the AHIP-370. A 1K
pull-down resistor is connected to signal XD (4) to simulate the B position.
Содержание AHIP-370
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