AHIP-370 Manual
62
PCI Backplane Connector (PCIMG1)
Pin
Signal
Pin
Signal
1
+5V
61
-12V
2
+12V
62
GND
3
+5V
63
GND
4
+5V
64
NC
5
+5V
65
+5V
6
PIRQA*
66
+5V
7
PIRQC*
67
PIRQB*
8
+5V
68
PIRQD*
9
PCLKS3
69
REQ3*
10
+5V
70
REQ1*
11
NC
71
GNT3*
12
GND
72
GND
13
GND
73
GND
14
GNT1*
74
PCLKS2
15
AGPRST*
75
GND
16
+5V
76
PCLKS0
17
GNT0*
77
GND
18
GND
78
REQ0*
19
REQ2*
79
+5V
20
AD(30)
80
PAD(31)
21
+3.3V_CPU
81
PAD(29)
22
PAD(28)
82
GND
23
PAD(26)
83
PAD(27)
24
GND
84
PAD(25)
25
PAD(24)
85
+3.3V_CPU
26
GNT2*
86
C_BE*(3)
27
+3.3V_CPU
87
PAD(23)
28
PAD(22)
88
GMD
29
PAD(20)
89
PAD(21)
30
GND
90
PAD(19)
31
PAD(18)
91
+3.3V_CPU
32
PAD(16)
92
PAD(17)
33
+3.3V_CPU
93
C_BE*(2)
34
FRAME*
94
GND
35
GND
95
IRDY*
36
TRDY*
96
+3.3V_CPU
37
GND
97
DEVSEL*
38
STOP*
98
GND
39
+3.3V_CPU
99
PLOCK*
40
SDONE (pullup)
100
PERR*
41
SB0* (pullup)
101
+3.3V_CPU
42
GND
102
SERR*
43
PAR
103
+3.3V_CPU
44
PAD(15)
104
C_BE*(1)
Содержание AHIP-370
Страница 6: ...AHIP 370 Manual 6 Architecture Figure 1 1 AHIP 370 Block diagram...
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