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141876(E)
Appendix A – Watchdog Timer
The Watchdog Timer is a device to ensure that standalone systems can always
recover from abnormal conditions that cause the system to crash. These conditions
may result from an external EMI or a software bug. When the system stops working,
hardware on the board will perform hardware reset (cold boot) to bring the system
back to a known state.
Three I/O ports control the operation of Watch-Dog Timer.
440 (hex)
Write
Set Watchdog Time period
Enable the refresh the Watchdog Timer.
440 (hex)
Write
Disable the Watchdog Timer.
Prior to enable the Watch-Dog Timer, user has to set the time-out period. The
resolution of the timer is 1 minute and the range of the timer is from 1 min to 255
min. You need to send the time-out value to the I/O port – 440H, and then enable it
by write data from the same I/O port – 440H(value is 01h-ffh). This activates the
timer that will eventually time out and reset the CPU board. To ensure that this reset
condition won’t occur, the Watch-Dog Timer must be periodically refreshed by write
the same I/O port 440H(the same value is 01h-ffh). This must be done within the
time-out period. (Refer to the example program.) Finally, we have to disable the
Watchdog timer by write the I/O port -- 440H (value is 0h). Otherwise, the system
could reset unconditionally.
Watchdog Timer Type Setting By RESET
Write port 440: WDT Enable & Time-out Period
PERIOD
Value
1 – 255 min.
01 – FF
Write port 440: WDT Disable
Function
Value
Disable
00
