XIMEA xiB64 Series, Техническое руководство

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xiB & xiB-64 - Technical Manual Version 1.06 104
8. list of figures
Figure 2-1 xiB and xiB-64 camera with heat sinks. 9
figure 3-1, xiB camera with/without the optional EF-Mount Adapter 15
Figure 3-2, drawing demonstrating the mounting hole positions. Camera shown without EF mount. 16
figure 3-3, CMV12000-mono, color and NIR, quantum efficiency curve, ©CMOSIS 18
figure 3-4, dimensional drawing CB120xG-CM 19
figure 3-5, dimensional drawing CB120xG-CM, with EF-mount adapter 19
figure 3-6, CMV20000 mono and color, quantum efficiency curve, ©CMOSIS 22
figure 3-7, dimensional drawing CB200xG-CM with EF-mount adapter 23
figure 3-8, dimensional drawing CB200xG-CM with EF-mount adapter 23
figure 3-9 CMV50000 Quantum Efficiency ©CMOSIS 26
figure 3-10, dimensional drawing CB500xG-CM w/o EF-mount adapter 27
figure 3-11, dimensional drawing CB500xG-CM with EF-mount adapter 27
figure 3-12, LUX13HS quantum efficiency chart ©Luxima 30
figure 3-13, dimensional drawing CB013xG-LX-X8G3 without EF-mount adapter 31
figure 3-14, dimensional drawing CB013xG-LX-X8G3 with EF-mount adapter and fan cooler unit 31
figure 3-15, LUX19HS quantum efficiency chart ©Luxima 34
figure 3-16, dimensional drawing CB019xG-LX-X8G3 without EF-mount adapter 35
figure 3-17, dimensional drawing CB019xG-LX-X8G3 with EF-mount adapter and fan cooler unit 35
figure 3-18, CMV12000-mono, color and NIR, quantum efficiency curve, ©CMOSIS 38
figure 3-19, dimensional drawing CB120xG-CM-X8G3 without EF-mount adapter 39
figure 3-20, dimensional drawing CB120xG-CM-X8G3 with EF-mount adapter and fan cooler unit 39
figure 3-21, position status LEDs 41
figure 3-22, position iPass
TM
connector 42
figure 3-23, position GPIO + power connector 43
figure 3-24, xiB IO connector pinout 43
figure 3-25, xiB-64 IO connector pinout 44
Figure 3-26 Recommended twisted pair configuration, xiB 45
figure 3-27, digital input, interface schematic 47
figure 3-28, digital input, interface wiring 47
figure 3-29, digital output, interface schematic 49
figure 3-30, digital output transfer characteristics 49
figure 3-31, Connecting Digital OUTPUT to a NPN-compatible PLC device input (biased) 50
figure 3-32, Connecting Digital OUTPUT to a NPN-compatible PLC device input - more bidirectional inputs used 50
figure 3-33, Connecting Digital OUTPUT to a NPN-compatible PLC device - single input 50
figure 3-34, Connecting Digital OUTPUT to a PNP-compatible device 51
figure 3-35, LED Driving 52
figure 3-36, Inductive load (Relay) Driving (inverted logic) 53
figure 3-37, Inductive load (Relay) Driving (non-inverted logic) 53
figure 3-38, non isolated input/output, interface schematic 55
figure 3-39, CBL-PEX4-COP-xM0 PCIe Gen.2 x4, copper cable 56
Figure 3-40, CBL-PEX4-FIB-xM0, PCIe Gen.3 x4, fiber optics cable 56
Figure 3-41, CBL-PEX8-FIB-xM0, PCIe Gen.3 x8, fiber optics cable 56
Figure 3-42 PEX4-G2-COP PCIe Gen.2 x4 extender host adapter for copper cables 57
figure 3-43, drawing sync cable – current revisions of this cable are 3m in length 58
figure 3-44, wiring sync cable CBL-CB-POWER-SYNC-3M0 58
Figure 3-45 drawing sync cable, current revisions of this cable are 3m in length 59
Figure 3-46 Wiring diagram CBL-MT-POWER-SYNC-3M0 59