xiB & xiB-64 - Technical Manual Version 1.06
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I/O connector Pin Assignment:
Pin
Name
Signal
Technical description
1
GND
External grounds for power and non-isolated I/O
2
AUX PWR
Power supply input
12-24V
3
IN1
Opto-isolated Input 1
(<0.8 Low; 4-24 High)
4
IN2
Opto-isolated Input 2
(<0.8 Low; 4-24 High)
5
IN GND
Ground for Opto-Isolated Inputs (IN1, IN2)
6
INOUT1
Non-isolated I/O
LVTTL(3.3, 50µA)
7
INOUT2
Non-isolated I/O
LVTTL(3.3, 50µA)
8
OUT1
Opto- isolated Output 1
Open collector
9
OUT2
Opto- isolated Output 2
Open collector
10
OUT GND
Ground for Opto-Isolated Out (OUT1, OUT2)
11
INOUT3
Non-isolated I/O
LVTTL(3.3, 50µA)
12
INOUT4
Non-isolated I/O
LVTTL(3.3, 50µA)
table 3-26, xiB I/O connector Pin Assignment
xiB-64
figure 3-25, xiB-64 IO connector pinout
I/O connector Pin Assignment:
Pin
Name
Signal
Technical description
1
IN2
Opto-isolated Input 2
(<0.8 Low; 4-24 High)
2
IN1
Opto-isolated Input 1
(<0.8 Low; 4-24 High)
3
OUT2
Opto-isolated Output 2
Open collector
4
OUT1
Opto-isolated Output 1
Open collector
5
AUX PWR
Power supply input
12-24V
6
GND
External grounds for power and non-isolated I/O
7
INOUT1
Non-isolated I/O
LVTTL(3.3, 50µA)
8
INOUT3
Non-isolated I/O
LVTTL(3.3, 50µA)
9
INOUT2
Non-isolated I/O
LVTTL(3.3, 50µA)
10
IN GND
Ground for Opto-Isolated Inputs (IN1, IN2)
11
OUT GND
Ground for Opto-Isolated Out (OUT1, OUT2)
12
INOUT4
Non-isolated I/O
LVTTL(3.3, 50µA)
table 3-27, xiB-64 I/O connector Pin Assignment
2
1
3
4
5
6
7
8
9
10
11 12