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ZC702 and ZVIK Getting Started Guide

www.xilinx.com

21

UG926 (v3.0.1) February 12, 2013

Hardware Bring-Up

f. Select the baud rate =

115200

, Data bits =

8

, Parity =

None

, Stop Bits =

1

, and Flow

control =

None.

Click

OK

.

Note:

Steps and diagrams refer to using a Windows XP or Windows 7 host PC.

Figure 2-4

through

Figure 2-6

show the steps for setting the USB-UART port.

X-Ref Target - Figure 2-4

Figure 2-4:

Configuring the Driver

UG926_c2_04_061212

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Содержание ZC702

Страница 1: ...0402905 01 Zynq 7000 All Programmable SoC ZC702 Evaluation Kit and Video and Imaging Kit ISE Design Suite 14 4 Getting Started Guide UG926 v3 0 1 February 12 2013...

Страница 2: ...t to the terms and conditions of the Limited Warranties which can be viewed at http www xilinx com warranty htm IP cores may be subject to warranty and support terms contained in a license issued to y...

Страница 3: ...ture Callout for the ZC702 Board and Figure 2 2 ZC702 with the UART and Power Cable Attached The TRD Demonstration Procedure page 32 adds information on how to demo the video application using an exte...

Страница 4: ...4 www xilinx com ZC702 and ZVIK Getting Started Guide UG926 v3 0 1 February 12 2013...

Страница 5: ...ements 17 Hardware BIST Board Setup 18 Hardware Bring Up 19 Run the BIST Application 24 Chapter 3 Getting Started with the Base Targeted Reference Design Introduction 27 Base TRD Key Features 29 Base...

Страница 6: ...xilinx com ZC702 and ZVIK Getting Started Guide UG926 v3 0 1 February 12 2013 Appendix A Additional Resources Xilinx Resources 49 Solution Centers 49 Further Resources 49 References 50 Appendix B War...

Страница 7: ...702 product page can be used to further explore the capabilities of the ZC702 board and the Zynq 7000 AP SoC Ref 2 For the most up to date information on the content provided with the ZC702 evaluation...

Страница 8: ...nq Z 7020 AP SoC for the embedded domain in a single package TRDs are key components of the Xilinx Targeted Design Platform TDP strategy TDPs from Xilinx provide customers with basic scalable design p...

Страница 9: ...ile this design the user needs to register for an evaluation IP license for the Video IP AMS demonstration providing an overview of the analog capabilities of the Zynq 7000 AP SoC devices 12V AC adapt...

Страница 10: ...er Camera tripod Lens holder Cables Second HDMI cable LCEDI image sensor cable For reference design files documents and board source files go to the ZVIK Product Page at www xilinx com ZVIK and click...

Страница 11: ...HDMI codec M24C08 EEPROM 1 KB 1 to 16 TCA6416APWR port expander RTC 8564JE real time clock FMC1 LPC I O expansion connector FMC2 LPC I O expansion connector PMBUS data clock Status LEDs Ethernet stat...

Страница 12: ...ey Features of the ZVIK Key features of the additional components of the Zynq 7000 AP SoC Video and Imaging kit include HDMI input output FMC module HDMI input HDMI output Video clock synthesizer Inte...

Страница 13: ...ader UG926_c1_03_081412 FMC2 LPC Connector 8 User LEDs User 2 Pole DIP Switch Zynq 7000 AP SoC Power Management System Bottom and Top of Board FPGA PROG Pushbutton I2C Real time Clock RTC DDR3 Compone...

Страница 14: ...ZC702 and ZVIK Getting Started Guide UG926 v3 0 1 February 12 2013 X Ref Target Figure 1 4 Figure 1 4 Default Jumper and Switch Settings on the ZC702 Board UG926_c1_04_021213 1 8 9 7 SW11 Down Off 2...

Страница 15: ...2 Right 3 Right 4 Right 5 Right SW11 power slide switch Off 8 1 Down Table 1 2 Default Jumper Settings Jumper Function Default Position Figure 1 4 Callout HDR_1 X 2 J5 CFGBVS short to GND OFF 4 J6 POR...

Страница 16: ...thernet PHY HDR 1 2 7 J31 Ethernet PHY HDR NONE 7 J32 Ethernet PHY HDR NONE 7 J33 USB 2 0 Mode 2 3 6 J34 USB 2 0 J1 ID SEL 1 2 7 J35 USB 2 0 J1 VBUS CAP SEL 1 2 6 J36 USB 2 0 J1 GND SEL 1 2 7 J37 XADC...

Страница 17: ...figuration This exercise of running the BIST demonstration should take approximately 10 to 15 minutes Note For a description of all the features on the ZC702 board see UG850 ZC702 Evaluation Board for...

Страница 18: ...structions for board bring up ZC702 Evaluation Board Setup The default jumper and switch settings of the ZC702 board are shown in Figure 1 4 Table 1 1 and Table 1 2 1 Set the SW16 switch as shown in F...

Страница 19: ...h the ZC702 board switched OFF SW11 in the down position as shown in Figure 1 4 plug the USB Mini B cable into the Mini USB port J17 labeled USB UART on the ZC702 board and the other end into a open U...

Страница 20: ...ownloaded from the Silicon Laboratories web site Ref 9 2 Set the USB UART connection to a known COM Port and baud rate in the Device Manager a Left click Start Menu and select Control Panel in Windows...

Страница 21: ...the baud rate 115200 Data bits 8 Parity None Stop Bits 1 and Flow control None Click OK Note Steps and diagrams refer to using a Windows XP or Windows 7 host PC Figure 2 4 through Figure 2 6 show the...

Страница 22: ...er 2 ZC702 Evaluation Kit Built In Self Test 22 www xilinx com ZC702 and ZVIK Getting Started Guide UG926 v3 0 1 February 12 2013 X Ref Target Figure 2 5 Figure 2 5 UART Port Setting Tab UG926_c2_05_0...

Страница 23: ...ZC702 and ZVIK Getting Started Guide www xilinx com 23 UG926 v3 0 1 February 12 2013 Hardware Bring Up X Ref Target Figure 2 6 Figure 2 6 Select a COM Port between COM1 and COM4 UG926_c2_06_061212...

Страница 24: ...window Figure 2 7 3 Select each relevant test and observe the test results For more information on the BIST software and additional tutorials including how to restore the default content of the onboar...

Страница 25: ...13 Run the BIST Application If any of the BIST tests fail check the settings of the switches and jumpers as shown in Figure 1 4 Table 1 1 and Table 1 2 If these settings are correct and the test still...

Страница 26: ...Chapter 2 ZC702 Evaluation Kit Built In Self Test 26 www xilinx com ZC702 and ZVIK Getting Started Guide UG926 v3 0 1 February 12 2013...

Страница 27: ...P SoC performs real time processing of a 1080P60 video stream either in software in the processing system PS or in a hardware accelerator in the PL The video processing path is user selectable through...

Страница 28: ...g computation intensive tasks onto PL thereby freeing the CPU resources to be available for user specific applications The ZC702 evaluation kit and ZVIK come with an SD card loaded with binaries that...

Страница 29: ...T I2C SD MMC and GPIO Clocks and reset for PL High bandwidth interconnect between PS and PL The PL includes Two AXI interconnects 64 bit wide at 150 MHz One AXI interconnect 32 bit wide at 75 MHz AXI...

Страница 30: ...of the SD MMC card and include BOOT bin devicetree dtb devicetree1080p dtb devicetree720p dtb uImage uramdisk image gz qt_lib img init sh run_sobel sh sobel_cmd sobel_qt images Note The default binar...

Страница 31: ...ideo input If an HDMI source is not available a DVI source can be used but an HDMI to DVI D cable connector adapter is required not included with the kit The connector adapter can be easily obtained a...

Страница 32: ...ecure the FMC IMAGEON FMC module on the ZC702 base board and support the free end of the board Assemble the hardware as shown in Figure 3 3 Use the longer standoffs screws and rubber feet for the free...

Страница 33: ...ort standoffs and four short screws as shown in Figure 3 3 Use the two long standoffs four longer screws and rubber feet to support the free end of the board Connect an external video source to the FM...

Страница 34: ...own in Figure 3 4 which allows the ZC702 board to boot from the SD MMC card 5 Make sure the display monitor is set for HDMI or DVI 1920 x 1080 Running the Qt Based GUI Application Demonstration 1 Powe...

Страница 35: ...oard to be configured and booted with Linux The XILINX ZYNQ banner appears on the display monitor after approximately two minutes as shown in Figure 3 5 4 The Qt based video demonstration application...

Страница 36: ...nd is controlled through the mouse The user can click Help for short messages and information about the control window of the QT application The GUI can be minimized with the MIN button See Figure 3 6...

Страница 37: ...I to evaluate the different use cases mentioned in Table 3 1 Video source control modes are explained as follows TPG interference X Ref Target Figure 3 7 Figure 3 7 Minimized GUI Mode UG926_c3_07_1211...

Страница 38: ...p to 100 for one of the two CPUs this can be seen in the CPU usage graph In this mode the frame rate of the video also drops to about 3 fps to 10 fps depending upon resolution Sobel HW Video processin...

Страница 39: ...e video demonstration To run the menu based UI application demonstration the Qt based GUI application which was started as explained in Running the Qt Based GUI Application Demonstration page 34 needs...

Страница 40: ...e TPG IP implemented in the PL External video available with the optional ZVIK FMC module The input video is supplied by an external video source and is connected through the FMC IMAGEON card X Ref Ta...

Страница 41: ...th the binary package and save it as devicetree dtb in the SD MMC root overwriting the old devicetree dtb Configure the display monitor to 720p60 resolution 1280 x 720p 60 Hz If using the ZVIK with an...

Страница 42: ...Chapter 3 Getting Started with the Base Targeted Reference Design 42 www xilinx com ZC702 and ZVIK Getting Started Guide UG926 v3 0 1 February 12 2013...

Страница 43: ...ks like linearization calibration over sampling and filtering The ZC702 evaluation kit includes the hardware and software to evaluate this ADC feature and to determine its usefulness in the user s end...

Страница 44: ...Time Engine AMS101 Installers for a 32 bit OS or a 64 bit OS a LabVIEW 32 bit Run Time Engine joule ni com nidu cds view p id 2534 lang en b LabVIEW 64 bit Run Time Engine joule ni com nidu cds view...

Страница 45: ...the directory and AMS_Eval_Demo_Files_ ISE_Version from the location it was copied to b Copy the boot bin file on the SD MMC card c Plug the SD MMC card into the ZC702 board d Set the ZC702 board swi...

Страница 46: ...Evaluator Tool allows designers to quickly evaluate the analog signals in the time and frequency domain display linearity verify the XADC register settings and measure the internal temperature sensor...

Страница 47: ...to restore the default content of the onboard nonvolatile storage see the ZC702 product page at www xilinx com zc702 Next Steps for the Zynq 7000 AP SoC Video and Imaging Kit ZVIK For more informatio...

Страница 48: ...Chapter 5 Next Steps 48 www xilinx com ZC702 and ZVIK Getting Started Guide UG926 v3 0 1 February 12 2013...

Страница 49: ...in Xilinx documentation see www xilinx com company terms htm Solution Centers See the Xilinx Solution Centers for support on devices software tools and intellectual property at all stages of the desig...

Страница 50: ...000 All Programmable SoC page www xilinx com products silicon devices soc zynq 7000 index htm 3 XilinxZynq 7000 All Programmable SoC documentation www xilinx com support documentation zynq 7000 htm 4...

Страница 51: ...r neglect or default of Customer For any breach by Xilinx of this limited warranty the exclusive remedy of Customer and the sole liability of Xilinx shall be at the option of Xilinx to replace or repa...

Страница 52: ...52 www xilinx com ZC702 and ZVIK Getting Started Guide UG926 v3 0 1 February 12 2013 Appendix B Warranty...

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