PPM-C412/Power-on Self-Test (POST) Codes
v1.0
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Page 61
0C
Detects the presence of keyboard in KBC port.
0E
Tests and initializes different input devices. Updates the kernel variables.
Traps the INT09h vector, so that the POST INT09h handler gets control for IRQ1. Uncompresses all
available languages, BIOS logo, and Silent logo modules.
13
Early POST initialization of chipset registers
20
Relocates system management interrupt vector for all CPU in the system.
24
Uncompresses and initializes any platform-specific BIOS modules. GPNV is initialized at this
checkpoint.
2A
Initializes different devices through DIM.
2C
Initializes different devices. Detects and initializes the video adapter installed in the system that has
optional ROMs.
2E
Initializes all output devices.
31
Allocates memory for ADM module and uncompress it. Gives control to ADM module for initialization.
Initializes language and font modules for ADM. Activates ADM module.
33
Initializes the silent boot module. Sets the window for displaying text information.
37
Displays sign-on message, CPU information, setup key message, and any OEM-specific information.
38
Initializes different devices through DIM. USB controllers are initialized at this point.
39
Initializes DMAC-1 and DMAC-2.
3A
Initializes RTC date/time.
3B
Tests for total memory installed in the system. Checks for DEL or ESC keys to limit memory test.
Displays total memory in the system.
3C
Mid POST initialization of chipset registers
40
Detects different devices (parallel ports, serial ports, and coprocessor in CPU, etc.) successfully
installed in the system and updates the BDA, EBDA, and so on.
52
Updates CMOS memory size from memory found in memory test. Allocates memory for extended
BIOS data area from base memory. Programs the memory hole or any kind of implementation that
needs an adjustment in system RAM size if needed.
60
Initializes NUM LOCK status and programs the KBD typematic rate.
75
Initializes Int-13 and prepares for IPL detection.
78
Initializes IPL devices controlled by BIOS and option ROMs.
7C
Generates and writes contents of ESCD in NVRAM.
84
Logs errors encountered during POST.
85
Displays errors to the user and gets the user response for error.
87
Executes BIOS setup if needed or requested. Checks boot password if installed.
8C
Late POST initialization of chipset registers
8D
Builds ACPI tables (if ACPI is supported).
8E
Programs the peripheral parameters. Enables or disables NMI as selected
90
Initializes system management interrupt by invoking all handlers. Note that this checkpoint comes
right after checkpoint 20h.
Table 22:
POST code checkpoints (Continued)
Checkpoint
Description