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SPEEDCOM SC5800 User Manual
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Overhead Link
Comms Error
•
Overhead PPP link error: the buffering system of the overhead link
cannot process data fast enough and received messages have been
discarded (the software cannot process the data fast enough).
Ethernet Comms
Error
•
The buffering system of the interface cannot process data fast enough
and received messages have been discarded (the software cannot
handle the data fast enough).
Element Manager
Comms Error
•
Message from PC or laptop too long (data corruption).
•
Software queuing/buffering errors in the NMS firmware.
Alarm 1 on
•
A digital optically isolated input used for general site alarm monitoring
(Auxiliary Input 1).
Alarm 2 on
•
A digital optically isolated input used for general site alarm monitoring
(Auxiliary Input 2).
6.5.2.3.1 Power-up Self Test Indicators
The following is a list of errors that can occur during the power-up phase of
operation. These errors may only be cleared by switching the Indoor Unit off and
then on again. The list also describes the possible faults and corrective actions to
solve each error.
Error Possible Faults and Corrective Actions
FLASH The Application FLASH memory test failed. Only a faulty Application Flash
device can cause this fault and the Application Flash device will have to be
replaced.
DRAM Error The DRAM test failed. Only a faulty DRAM device can cause this fault and
the DRAM will have to be replaced.
SRAM Error The battery-backed up SRAM test failed. Only a faulty SRAM device or
battery can cause this fault and the Battery and/or SRAM will have to be
replaced.
Watchdog Reset Software error. Please contact the supplier. Processor triggered a
watchdog restart because watchdog is no longer being toggled by the
application. Either the application has become too overloaded or this is a
software or design fault.
Hard Reset A hardware reset was performed. This is an indication of the last reason for
a reset and does not constitute a fault condition.
Unknown Reset Another reset detected by the Indoor Unit’s microprocessor (other than
Watchdog and Hard Reset) was performed. This is an indication of the last
reason for a reset and does not constitute a fault condition.
Line Interface
Error The line interface transceiver is not responding as expected and is most
likely faulty. The transceiver is programmed for operation and then checked
to see that the values programmed are valid (read correctly).
FPGA The FPGA register interface is not responding correctly and is most likely
faulty. The FPGA is programmed for operation and then checked to see
that the values programmed are valid (read correctly).
Real Time Clock The Real Time Clock (RTC) is not responding correctly and is most likely
faulty. The RTC is programmed for operation and then checked to see that
the values programmed are valid (read correctly).
Note: Use the Clear button to clear alarm indicators.