VMM-T1 User Manual
24
A single TTL HIGH pulse at the GATE INPUT equal to the trigger period will allow one trigger signal
from the trigger stream to be enabled. (See Figure 4A)
If a single TTL HIGH pulse arrives at the GATE INPUT and is equal to twice the trigger period, two
trigger signals from the trigger stream will be enabled. (See Figure 4B) Therefore, the number of
trigger pulses input (or GATE INPUT duration) is equal to the trigger period times the number of
exposures desired.
Please note
:
The
VMM-T1
TRIGGER INPUT triggers the internal timers. The EXP PRESET will
determine the number of cycles which is the combination of EXPOSURE and DELAY time.
Figure 4A & 4B: Gate Input Timing Diagram
TRIGGER
SIGNAL STREAM
(ACTIVE LOW)
HIGH GATE
PULSE
TWO PULSES
ALLOWED TO
TRIGGER UNIT
TRIGGER
PERIOD
TRIGGER
PERIOD
TRIGGER
SIGNAL STREAM
(ACTIVE LOW)
GATE SIGNAL
(ACTIVE HIGH)
HIGH GATE
PULSE
GATE SIGNAL
(ACTIVE HIGH)
2 TRIGGER
PULSES
(A)
(B)
LOW GATE PULSE
ACTIVE HIGH PULSE WIDTH
EQUAL TO 2X TRIGGER PERIOD
LOW GATE PULSE
ACTIVE HIGH PULSE WIDTH
EQUAL TO TRIGGER PERIOD
TRIGGER
PULSE
SINGLE PULSE
ALLOWED TO
TRIGGER UNIT
