NORA-W10 series - System integration manual
UBX-22005601 - R04
Module integration
Page 15 of 56
C1-Public
2.6.1.1
Antenna matching
The antenna return loss should be as low as possible across the entire band to provide optimal
performance. The enclosure, shields, other components, and surrounding environment might impact
the return loss that is seen at the antenna port. Matching components are often required to retune
the antenna to 50
characteristic impedance.
It is difficult to predict the actual matching values for the antenna in the final form factor. Therefore,
it is good practice to have a placeholder in the circuit with a “pi” network, with two shunt components
and a series component in the middle. This allows maximum flexibility while tuning the matching to
the antenna feed.
2.6.1.2
Approved antenna designs
NORA-W10 modules come with a pre-certified design that can be used to save costs and time during
the certification process. To take full advantage of this service, you must implement the antenna
layout in accordance with u-blox reference designs. Reference designs are available on request from
u-blox.
The designer integrating a u-blox reference design into an end-product is solely responsible for any
unintentional RF emission generated by the end product.
The module may be integrated with other antennas. In which case, the OEM installer must certify the
design with respective regulatory agencies.
2.6.2
Internal antenna
NORA-W106 module have an internal antenna that are specifically designed and optimized for u-blox
Wi-Fi, Bluetooth Basic Rate/Enhanced Data Rate (BR/EDR), and Bluetooth LE modules. With
NORA-W106, designers only need to consider the module placement and GND clearance in antenna
area.
2.7
Data interfaces
2.7.1
Universal asynchronous serial interface (UART)
NORA-W10 modules have three UART interfaces, UART0 to UART2, for data communication and
firmware upgrade. Each interface provides asynchronous communication support for RS232, RS485,
and IrDA standards (with external drivers). Each UART supports the following signals:
•
Data lines (
RXD
as input,
TXD
as output)
•
Hardware flow control lines (
CTS
as input,
RTS
as output)
You can use the UARTs in 4-wire mode with hardware flow control, or in 2-wire mode with
TXD
and
RXD
only.
☞
2-wire mode is not recommended, because it is prone to buffer overruns.
The
UART0
interface is used for firmware upgrade. See also
Software
.
It is recommended that the
UART0
is either connected to a header for firmware upgrade or made
available for test points.
The IO level of the UART follows
VCC_IO
.
2.7.2
Serial peripheral interface (SPI)
Four SPI interfaces are available for the application. SPI0 is configured to internal flash storage, can
be controlled with chip select CS0. Additional flash cannot be connected to SPI0 interface, but an
external PSRAM can be connected. CS1 will become chip select for PSRAM.