Error! No text of specified style in document. - System Integration Manual
CDMA-2X-11004-P1
Objective Specification
System description
Page 14 of 79
power. In the downlink path, the internal LNA enhances the RX sensitivity. An internal automatic
gain control amplifier optimizes the signal levels before delivering to the analog I/Q to baseband
for further digital processing.
In all the modes, Tx & Rx RF synthesizers are an on-chip voltage controlled oscillator are used to
generate the local oscillator signal.
The frequency reference to RF synthesizers are provided by an free running 19.2 MHz XO. The Rx
path locks and tracks to the base station carrier. An learning algorithm is implemented to capture
the temperature characteristic of the xtal, comparing the XO and carrier frequencies, while
measuring the thermistor in close proximity to the crystal oscillator. A lookup table is saved over
temperature and time. The known frequency difference of the free running crystal oscillator is
corrected in the baseband processor enabling quick acquisition.
Baseband section and power management unit
Another shielding section includes all the digital circuitry and the power supplies, basically the
following functional blocks:
Wireless baseband processor, a mixed signal ASIC which integrates:
Microprocessor for controller functions, CDMA upper layer software
ARM9 coprocessor and HW accelerator for CDMA Layer 1 control software and routines
Dedicated HW for peripherals control, as UART, USB, etc
Memory system in a Multi-Chip Package (MCP) integrating two devices:
NOR flash non-volatile memory
DDR SRAM volatile memory
Power Management Unit (PMU), used to derive all the system supply voltages from the module
supply VCC
5.2
Pin description
Table 2 provides a summary of the module pin names and descriptions.
For the exact specification including pin numbering and additional information see the LISA-
C200 Data Sheet [1] or the FW75-C200 Data Sheet [2].
Name
Module
Power
domain
I/O
Description
Remarks
VCC All
VCC
-
Battery Input
Module supply input
V_INT FW75
LISA-C200
-
-
O
O
Digital I/O Interfaces
supply output
Digital I/O Interfaces
supply output
V_INT = 2.85V (typical) generated by the
module when it is switched-on and the
RESET_N (external reset input pin) is not
forced to the low level.
V_INT = 1.8V (typical) generated by the
module when it is switched-on and the
RESET_N (external reset input pin) is not
forced to the low level.
PWR_ON
All
POS
I
Power-on input
PWR_ON pin has Internal pull-up resistor.
GPIO1..10 LISA-C200
GDI I/O
GPIO
GPIO6..10
Reserved.
RESET_N
LISA-C200 ERS
I
External reset input
RESET_N pin has Internal pull-up resistor.
HW_SHUTDOWN FW75
ERS
I
External Shutdown input
HW_SHUTDOWN pin has Internal pull-up
resistor.
ANT All
ANT
-
I/O
RF
antenna