u-blox LEXI-R422, Руководство по системной интеграции

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LEXI-R422 - System integration manual
UBX-23007449 - R02 Design-in Page 85 of 108
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2.13 Design-in checklist
This section provides a design-in checklist.
2.13.1 Schematic checklist
The following are the most important points for a simple schematic check:

DC supply must provide a nominal voltage at VCC pin within the operating range limits.
 DC supply must be capable of supporting the highest peak / pulse current consumption values
and the maximum averaged current consumption values in connected mode, as specified in
the LEXI-R422 data sheet [1] .
 VCC voltage supply should be clean, with very low ripple/noise: provide the suggested bypass
capacitors, in particular if the application device integrates an internal antenna.

Do not apply loads which might exceed the limit for maximum available current from V_INT
supply.

Check that voltage level of any connected pin does not exceed the relative operating range.
 Capacitance and series resistance must be limited on each SIM signal to match the SIM
specifications.

Insert the suggested pF capacitors on each SIM signal and low capacitance ESD protections if
accessible.

Check UART signals direction, as the modules signal names follow the ITU-T V.24
recommendation [5] .

Capacitance and series resistance must be limited on each high speed line of the USB
interface.

It is strongly recommended to provide accessible test points directly connected to the V_INT ,
PWR_CTRL , USB_5V0 , USB_3V3 , USB_D+ , USB_D- , and RSVD #99 pins for diagnostic and/or
FW update purposes.

Use transistors with at least an integrated resistor in the base pin or otherwise put a 10 k 
resistor on the board in series to the GPIO when those are used to drive LEDs.

Provide adequate precautions for EMC / ESD immunity as required on the application board.

Do not apply voltage to any generic digital interface pin of LEXI-R422 modules before the
switch-on of the generic digital interface supply source ( V_INT ).

All unused pins can be left unconnected.
2.13.2 Layout checklist
The following are the most important points for a simple layout check:
 Check 50  nominal characteristic impedance of the RF transmission line connected to the
ANT port (antenna RF interface).
 Check cellular antenna trace design for regulatory compliance perspective (see section 4.2 for
FCC United States, and related section 2.4.1.6 ).
 Ensure no coupling occurs between the RF interface and noisy or sensitive signals (SIM
signals, high-speed digital lines such as USB, and other data lines).
 Optimize placement for minimum length of RF line.
 Check the footprint and paste mask designed for the LEXI-R422 module as illustrated in
section 2.10 .
 VCC line should be enough wide and as short as possible.