u-blox LEXI-R422, Руководство по системной интеграции

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LEXI-R422 - System integration manual
UBX-23007449 - R02 Design-in Page 80 of 108
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2.6.3.2 Guidelines for I2C layout design
The I2C serial interface requires the same consideration regarding electro-magnetic interference as
any other digital interface. Keep the traces short and avoid coupling with RF line or sensitive analog
inputs, since the signals can cause the radiation of some harmonics of the digital data frequency.
2.7 General purpose input / output
2.7.1 Guidelines for GPIO circuit design
A typical usage of LEXI-R422 modules GPIOs can be the following:
• Network indication provided over GPIO1 pin (see Figure 61 / Table 38 below)
• GNSS supply enable function provided by the GPIO2 pin (see section 2.6.3 )
• GNSS Tx data ready function provided by the GPIO3 pin (see section 2.6.3 )
• Module operating status indication provided by a GPIO pin (see section 1.6.1 )
• SIM card detection provided over GPIO6 pin (see Figure 45 / Table 29 in section 2.5 )
• Antenna dynamic tuning function provided by RFCTRL1 and RFCTRL2 pins (see section 2.4.4 )
LEXI-R422
GPIO1
R1
R3
3V8
Network indicator
R2
R2
DL1
T1
Figure 61: Application circuit for network indication provided over GPIO1
Reference Description Part number - Manufacturer
R1 10 k  resistor 0402 5% 0.1 W Generic manufacturer
R2 47 k  resistor 0402 5% 0.1 W Generic manufacturer
R3
820

resistor 0402 5% 0.1 W
Generic manufacturer
DL1 LED red SMT 0603 LTST-C190KRKT - Lite-on Technology Corporation
T1 NPN BJT transistor BC847 - Infineon
Table 38: Components for network indication application circuit
☞
Use transistors with at least an integrated resistor in the base pin or otherwise put a 10 k  resistor
on the board in series to the GPIO of LEXI-R422 modules.
☞
Do not apply voltage to any GPIO of the module before the switch-on of the GPIOs supply, which is
the
V_INT supply of the module.
☞
ESD sensitivity rating of the GPIO pins is 1 kV (HBM according to JS-001-2017). Higher protection
level could be required if the lines are externally accessible and it can be achieved by mounting an
ESD protection (e.g. EPCOS CA05P4S14THSG varistor) close to accessible points.
☞
If the GPIO pins are not used, they can be left unconnected on the application board.
2.7.2 Guidelines for general purpose input/output layout design
The general purpose inputs / outputs pins are generally not critical for layout.