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TOSHIBA G9000 UPS White Paper
© 2008 TOSHIBA INTERNATIONAL CORPORATION – INDUSTRIAL DIVISION Page 3
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UPSG9000WP081201
To illustrate the waveform synthesis using the conventional concept,
consider its schematic diagram as shown in Figure 3. The line-to-line
voltage (for example, terminals U and V) has three voltage levels (+E, 0,
-E Volts) as a result of four possible combinations (Table 1). Figure 4
shows a train of variable-width pulses (line-to-line voltage) using a
conventional inverter. To obtain a sinusoidal signal, filtering using bulky
reactors is required to suppress high frequency components.
E E
2 2
E E
2 2
E E
2 2
E E
2 2
-
+
-
+
-
+
+
-
E
E
0
+
-
Terminal
U
Terminal
V
Line-to-
Line
Voltage
(U - V)
0
E
0
- E
FIGURE 3
Equivalent circuit
of a conventional
2-level 3-phase
inverter
TABLE 1
Pattern of the
line-to-line output
voltage for a 2-level
inverter
FIGURE 4
Line-to-line voltage
in a conventional
2-level inverter