⎯
121
⎯
6 F 2 S 0 8 2 8
jacks A and B or by the LEDs above the jacks.
On screens other than the above screen, observation with the monitoring jacks is disabled.
4.2.7.4 Sim.
fault
The "Sim. fault" on the "Test" menu is used to generate a synchronized trigger signal for
end-to-end dynamic tests. The signal can be monitored when the signal FG (No.421) in the signal
list is assigned to a user configurable auxiliary relay (BO) at the local and remote terminals. The
auxiliary relays trigger a simultaneous test current application to the local and remote terminal
differential elements when the END key is pressed on the "Sim. fault" screen at either terminal.
The signal transmission delay time is automatically compensated in the relay and the operation
time difference of the auxiliary relays is within 1ms. For the signal list, see Appendix B.
•
Select "Sim. fault" on the "Test" screen to display the "Operate?" screen
O p e r a t e ?
E N T E R = Y C A N C E L = N
•
Keep pressing the ENTER key to generate the synchronized trigger signal.
The signal FG (No.421) operates.
•
Release pressing the ENTER key to reset the operation.
•
Press the CANCEL key to return to the "Test" screen.
Содержание GRL150-100 Series
Страница 149: ... 148 6 F 2 S 0 8 2 8 ...
Страница 150: ... 149 6 F 2 S 0 8 2 8 Appendix A Programmable Reset Characteristics and Implementation of Thermal Model to IEC60255 8 ...
Страница 154: ... 153 6 F 2 S 0 8 2 8 Appendix B Signal List ...
Страница 180: ... 179 6 F 2 S 0 8 2 8 Appendix C Binary Output Default Setting List ...
Страница 182: ... 181 6 F 2 S 0 8 2 8 Appendix D Details of Relay Menu ...
Страница 195: ... 194 6 F 2 S 0 8 2 8 ...
Страница 196: ... 195 6 F 2 S 0 8 2 8 Appendix E Case Outline ...
Страница 199: ... 198 6 F 2 S 0 8 2 8 ...
Страница 200: ... 199 6 F 2 S 0 8 2 8 Appendix F Typical External Connections ...
Страница 223: ... 222 6 F 2 S 0 8 2 8 ...
Страница 228: ... 227 6 F 2 S 0 8 2 8 Appendix I Return Repair Form ...
Страница 232: ... 231 6 F 2 S 0 8 2 8 Appendix J Technical Data ...
Страница 238: ... 237 6 F 2 S 0 8 2 8 Appendix K Symbols Used in Scheme Logic ...
Страница 241: ... 240 6 F 2 S 0 8 2 8 ...
Страница 242: ... 241 6 F 2 S 0 8 2 8 Appendix L Inverse Time Characteristics ...
Страница 248: ... 247 6 F 2 S 0 8 2 8 Appendix M IEC60870 5 103 Interoperability ...
Страница 260: ... 259 6 F 2 S 0 8 2 8 Appendix N Resistor Box Option ...
Страница 263: ... 262 6 F 2 S 0 8 2 8 ...
Страница 264: ... 263 6 F 2 S 0 8 2 8 Appendix O Ordering ...
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