Toshiba 27WLT56B, Руководство по обслуживанию

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27
27” TFT TV Service Manual 05/09/2005
XPD0 A8 I/O LSB of expansion port data
XPD2 A9 I/O MSB - 5 of expansion port data
XPD4 A10 I/O MSB - 3 of expansion port data
XPD6 A11 I/O MSB - 1 of expansion port data
TEST1 A12 I/pu do not connect, reserved for future extensions and for testing:
scan input
TEST2 A13 I/pu do not connect, reserved for future extensions and for testing:
scan input
AI41 B1 I analog input 41
TEST3 B2 O do not connect, reserved for future extensions and for testing
V
DD(xtal)
B3 P supply voltage for crystal oscillator
XTALI B4 I input terminal for 24.576 MHz (32.11 MHz) crystal oscillator
or connection of external oscillator with TTL compatible
square wave clock signal
TDI B5 I/pu test data input for boundary scan test; note 2
TCK B6 I/pu test clock for boundary scan test; note 2
XDQ B7 I/O data qualifier for expansion port
XPD1 B8 I/O MSB - 6 of expansion port data
XPD3 B9 I/O MSB - 4 of expansion port data
XPD5 B10 I/O MSB - 2 of expansion port data
XTRI B11 I X-port output control signal, affects all X-port pins (XPD7 to
XPD0, XRH, XRV, XDQ and XCLK), enable and active
polarity is under software control (bits XPE in subaddress
83H)
TEST4 B12 O do not connect, reserved for future extensions and for testing:
scan output
TEST5 B13 NC do not connect, reserved for future extensions and for testing
TEST6 B14 NC do not connect, reserved for future extensions and for testing
VSSA4 C1 P ground for analog inputs AI4x
AGND C2 P analog ground
TEST7 C3 NC do not connect, reserved for future extensions and for testing
TEST8 C4 NC do not connect, reserved for future extensions and for testing
V
DDD1
C5 P digital supply voltage 1 (peripheral cells)
TRST C6 I/pu test reset input (active LOW), for boundary scan test (with
internal pull-up); notes 2, 3 and 4
XRH C7 I/O horizontal reference I/O expansion port
V
DDD2
C8 P digital supply voltage 2 (core)
V
DDD3
C9 P digital supply voltage 3 (peripheral cells)
V
DDD4
C10 P digital supply voltage 4 (core)
XPD7 C11 I/O MSB of expansion port data
TEST9 C12 NC do not connect, reserved for future extensions and for testing
TEST10 C13 NC do not connect, reserved for future extensions and for testing
TEST11 C14 I/pu do not connect, reserved for future extensions and for testing:
scan input
AI43 D1 I analog input 43
AI42 D2 I analog input 42
AI4D D3 I differential input for ADC channel 4 (pins AI41 to AI44)
V
DDA4
D4 P analog supply voltage for analog inputs AI4x (3.3 V)
V
SSD1
D5 P digital ground 1 (peripheral cells)
TMS D6 I/pu test mode select input for boundary scan test or scan test;
note 2
V
SSD2
D7 P digital ground 2 (core; substrate connection)
XRV D8 I/O vertical reference I/O expansion port
V
SSD3
D9 P digital ground 3 (peripheral cells)
V
SSD4
D10 P digital ground 4 (core)
V
SSD5
D11 P digital ground 5 (peripheral cells)
V
DDD5
D12 P digital supply voltage 5 (peripheral cells)
TEST12 D13 I/pu do not connect, reserved for future extensions and for testing:
scan input
HPD0 D14 I/O LSB of host port data I/O, extended C
B
-C
R
input for
expansion port, extended C
B
-C
R
output for image port
AI44 E1 I analog input 44
V
DDA4A
E2 P analog supply voltage for analog inputs AI4x (3.3 V)
AI31 E3 I analog input 31