11
27” TFT TV Service Manual
05/09/2005
12.6.3. Pin
connections
DIP Pin connections
CO Pin connections
NC: Not connected
Signal names
SDA
Serial data Address Input/Output
SCL
Serial Clock (I
2
C mode)
V
cc
Supply
voltage
V
ss
Ground
VCLK
Clock transmit only mode
12.7.
TLC7733
12.7.1. Description
The TLC77xx family of micropower supply voltage supervisors are designed for reset control, primarily
in microcomputer and microprocessor systems.
During power-on, RESET is asserted when V
DD
reaches 1 V. After minimum V
DD
(.
2 V) is established,
the circuit monitors SENSE voltage and keeps the reset outputs active as long as SENSE voltage
(V
I(SENSE)
) remains below the threshold voltage. An internal timer delays return of the output to the
inactive state to ensure proper system reset. The delay time, t
d
, is determined by an external capacitor:
t
d
= 2.1 x 10
4
x C
T
where
C
T
is in farads
t
d
is in seconds
The TLC77xx has a fixed SENSE threshold voltage set by an internal voltage divider. When SENSE
voltage drops below the threshold voltage, the outputs become active and stay in that state until
SENSE voltage returns above threshold voltage and the delay time, t
d
, has expired.
In addition to the power-on-reset and undervoltage-supervisor function, the TLC77xx adds power-down
control support for static RAM. When CONTROL is tied to GND, RESET will act as active high. The
voltage monitor contains additional logic intended for control of static memories with battery backup
during power failure. By driving the chip select (CS) of the memory circuit with the RESET output of the
TLC77xx and with the CONTROL driven by the memory bank select signal (CSH1) of the
microprocessor (see Figure 10), the memory circuit is automatically disabled during a power loss. (In
this application the TLC77xx power has to be supplied by the battery.)
The TLC77xxQ is characterized for operation over a temperature range of –4
0°
C to 125
°
C, and the
TLC77xxI is characterized for operation over a temperature range of –40
°
C to 85
°
C.
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