TOPSCCC EX-96085, Руководство пользователя

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EX-96085 User Manual 64
5.5 ADVANCED CHIPSET FEATURES
Choose the
〝
ADVANCED CHIPSET FEATURES
〞
from the main menu, the screen shown as
below.
Phoenix - AwardBIOS CMOS Setup Utility
Advanced Chipset Features
Item Help
DRAM Timing Selectable
X CAS Latency Time
Active to Precharge Delay
X DRAM RAS# to CAS# Delay
X DRAM RAS# Precharge
DRAM Data Integrity Mode
System BIOS Cacheable
Video BIOS Cacheable
Memory Hole At 15M-16M
Delayed Transaction
AGP Aperture Size (MB)
** VGA Setting **
On-Chip VGA
On-Chip Frame Buffer Size
Boot Display
PCI SERR# NMI
[By SPD]
[2.5]
[7]
[3]
[3]
[Non-ECC]
[Enabled]
[Disabled]
[Enabled]
[Enabled]
[64]
[Enabled]
[32MB]
[CRT+LFP]
[Disabled]
Menu Level ►
↑↓→←
: Move Enter: Select +/-/PU/PD:Value F10:Save ESC:Exit
F1:General Help
F5: Previous Values F6: Fail-Safe Defaults F7:Optimized Defaults
Chipset Features Setup Screen
This parameter allows you to configure the system based on the specific features of the installed
chipset. The chipset manages bus speed and access to system memory resources, such as DRAM
and the external cache.
It also coordinates communications between conventional ISA bus and the PCI bus. It must be stated
that these items should never need to be altered. The default settings have been chosen because
they provide the best operating conditions for the system. The only time you might consider making
any changes would be if you discovered that data was being lost while using your system.