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VDP Configuration RAM
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2 VDP Configuration RAM
The first step in configuring the TVP5154A for VBI data slicing is to load the VDP Configuration RAM
(C-RAM). The C-RAM defines the data slicing modes for the various data services, with each mode
having its own unique RAM address and 16 byte block of memory.
Table 2 shows the recommended
setup values for the various data services that are supported. Prior to loading the C-RAM, the Line Mode
registers must all be programmed with a value of FFh to avoid conflict between the VDP and
microprocessor during the load process. Full field mode must also be disabled in I
2
C register CFh.
Table 2. Configuration RAM Recommended Settings
Index Address 0 1 2 3 4 5 6 7 8 9 A B C D E F
Reserved 000h Reserved
WST SECAM 010h AA AA FF FF E7 2E 20 A6 E4 B4 OE 0 7 0 10 0
Reserved 020h Reserved
WST PAL B 030h AA AA FF FF 27 2E 20 AB A4 72 10 0 7 0 10 0
Reserved 040h Reserved
WST PAL C 050h AA AA FF FF E7 2E 20 22 A4 98 0D 0 0 0 10 0
Reserved 060h Reserved
WST NTSC 070h AA AA FF FF 27 2E 20 23 63 93 0D 0 0 0 10 0
Reserved 080h Reserved
NABTS, NTSC 090h AA AA FF FF E7 2E 20 A2 63 93 0D 0 7 0 15 0
Reserved 0A0h Reserved
NABTS, NTSC-J 0B0h AA AA FF FF A7 2E 20 A3 63 93 0D 0 7 0 10 0
Reserved 0C0h Reserved
CC, PAL/SECAM 0D0h AA 2A FF 3F 04 51 6E 02 A4 7B 09 0 0 0 27 0
Reserved 0E0h Reserved
CC, NTSC 0F0h AA 2A FF 3F 04 51 6E 02 63 8C 09 0 0 0 27 0
Reserved 100h Reserved
WSS/CGMS, PAL/SECAM 110h 5B 55 C5 FF 0 71 6E 42 A4 CD 0F 0 0 0 3A 0
Reserved 120h Reserved
WSS/CGMS, NTSC 130h 38 0 3F 0 0 71 6E 43 63 7C 08 0 0 0 39 0
Reserved 140h Reserved
VITC, PAL/SECAM 150h 0 0 0 0 0 8F 6D 49 A4 85 08 0 0 0 4C 0
Reserved 160h Reserved
VITC, NTSC 170h 0 0 0 0 0 8F 6D 49 63 94 08 0 0 0 4C 0
Reserved 180h Reserved
VPS, PAL 190h AA AA FF FF BA CE 2B 8D A4 DA 0B 0 7 0 60 0
Reserved 1A0h Programmable
Gemstar Custom 1 1B0h 99 99 FF FF 05 51 6E 05 63 18 13 80 0 0 60 0
The C-RAM is accessed through the use of three I
2
C registers (C3h-C5h). Registers C4h and C5h must
be programmed with the 9-bit starting address of the block of C-RAM to be programmed. I
2
C read and
write operations are then performed indirectly using register C3h. The C-RAM address is automatically
incremented following each I
2
C transaction. Only the portion of the C-RAM that includes the data service
to be used needs to be programmed. If WSS/CGMS for NTSC is the only desired data service, for
example, only the 16 bytes starting at C-RAM address 130h need to be programmed.
Figure 2 shows
example C code for loading the WSS/CGMS C-RAM.
4 TVP5154A VBI Quick Start SLEA104 – July 2010
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