TLV1544EVM Operational Procedure
1-5
Overview
1.7
TLV1544EVM Operational Procedure
Some signal setup or software is required for the TLV1544EVM. The TLV1544
data sheet provides the timing requirements and the application report (litera-
ture number SLAA025) supplies an example of software using the
TMS320C50 DSP. Once the input requirements are completed, the operating
procedures for the TLV1544EVM are as follows.
-
Connect
±
7 to
±
10 V and ground to the V+, V–, and GND terminals of J1.
These terminals are marked on the bottom side of the EVM. Ensure that
JP6 is shorted to establish zero volts as the operating point for the bipolar
operational amplifier.
SW1 can select 5-V V
CC
or 2.7-V V
CC
. The 2.7 volt operation should be
used only with a host interface that provides 3-V nominal or less input
signals to the EVM.
-
For most DSP operation, JP5 is open and for most microprocessor opera-
tion, JP5 is shorted. The INV CLK terminal condition is controlled by this
jumper and therefore, the clocking edge that is used for data input.
-
The analog input that is connected to the TLV1544 is determined by soft-
ware and any input can be selected for testing. The four channels are con-
figured as follows:
Analog Input
A0
Potentiometer with operational amplifier buffer
A1
±
10 V supply voltage follower
A2
Uses external input unbuffered
A3
Uses external input unbuffered
Normally, through the software, the full scale, mid scale, and zero scale
could be checked first. Then A0 can be selected and checked with the po-
tentiometer adjustment.
-
Connect the appropriate voltage reference as follows. Place a short on
JP2, position 2 toward TP11 designation, to connect REF– terminal to
ground.
JP1 Designation Reference Voltage
1
On board absolute reference (4.086 V at 5 V V
CC
or 2.5 V at 2.7 V V
CC
)
3
V
CC
When SW1 is changed the onboard absolute reference is automatically
changed to the proper value for the V
CC
selected.
-
The I/O signals can be monitored at J7.
-
The additional analog inputs can be used for application of external sig-
nals. Select the desired analog input for board checkout. Ensure that JP3,
JP4, and JP6 are shorted with a jumper connection.
Содержание TLV1544EVM
Страница 1: ...TLV1544EVM Evaluation Module for the TLV1544 10 Bit ADC 1998 Mixed Signal Products User s Guide...
Страница 2: ...Printed in U S A 08 98 SLAU014...
Страница 8: ...vi...
Страница 16: ...1 6 Overview...
Страница 19: ...PCB Layout 2 3 Physical Description Figure 2 2 PCB Layout...
Страница 20: ...PCB Layout 2 4 Physical Description Figure 2 3 PCB Layout...
Страница 21: ...PCB Layout 2 5 Physical Description Figure 2 4 PCB Layout...
Страница 22: ...PCB Layout 2 6 Physical Description Figure 2 5 PCB Layout...
