Texas Instruments TLC694 Series, Техническое справочное руководство

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15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
MSB LSB
0 0
Common Shift Register
SIN
SCLK
SOUT 0
TLC6948 Design Example
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46 SLVUBF4A – February 2018 – Revised June 2019
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Device Operation Examples
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5. WRTFC4: Shift the FC4 register data from SIN into the common shift registers of the devices with
the SCLK rising edge. Pull up the LAT signal before the last 11 SCLK rising edges, and pull down the
LAT signal after the last SCLK rising edge. At the same time as the last SCLK falling edge, the FC4
data is latched into the FC4 register. The same as WRTFC1, there are 15 TLC6948 devices cascaded
in this example, and a total of 240 SCLK rising edges are required to shift the FC4 register data to all
devices.
4.2.3 PWM Grayscale Control
After all the FC registers are configured, send the grayscale (GS) data and GCLK clock signal to start the
frame image display.
4.2.3.1 Send GS Data to the TLC6948 Device
Sending GS data to the TLC6948 device follows the procedure below.
Figure 4-4. 13-bit GS Data for TLC6948
1. Shift the GS data from SIN into the common shift registers of the devices with the SCLK rising edge.
a. The data length of each TLC6948 device is required to be 16 bits. To meet this requirement, add
3 0-value bits (LSB) after the 13-bit GS data (MSB) in this design example, as shown in
Figure 4-4 .
b. In this example, there are 15 TLC6948 devices cascaded. According to Equation 5 , a total of
3840 GS data bits must be sent for each GS data latch operation.
2. Send the VSYNC command when all the 45 lines of GS data are latched into the internal display
memory.
3. Send the GCLK signal to start displaying the GS data just latched into memory. See
Section 3.3.3.1
to calculate the required number of GCLKs for each sub-period. In this design example, with default
register configuration, the total number of required GCLKs for each sub-period is 156 for GCLK single-
edge operation or 78 for GCLK dual-edge operation.
4. At the same time as Step 3, send the next frame of GS data into the device the same as in step 1.
5. Repeat Step 1 through Step 4 until all the display frames are complete.