Texas Instruments SRC4194EVM, Руководство пользователя

Страница: 16 / 45

SRC4194EVM Functional Block Diagram
1-6
1.4 SRC4194EVM Functional Block Diagram
The SRC4194EVM functional block diagram is shown in Figure 1−2. Besides
the SRC4194, there are multiple audio input and output port interfaces, refer-
ence clock generation circuitry, switches for Hardware mode configuration and
logic functions, and a buffered host port interface for communications with the
SRC4194 SPI port when configured for Software mode operation. Chapter 3
provides operational and configuration details for the various hardware func-
tions included on the EVM board.
Figure 1−2. SRC4194EVM Functional Block Diagram
AES3 Tx
DIT4192
AES3 Tx
DIT4192
AES3 Rx
CS8414
AES3 Rx
CS8414
PORT
BUFFERS
PORT
BUFFERS
PORT
BUFFERS
PORT
BUFFERS
SW8
SW8
SW6
SW6
H
D
R
H
D
R
H
D
R
H
D
R
AES
OUT B
AES
OUT A
AES
IN B
AES
IN A
OUTPUT
PORT B
OUTPUT
PORT A
INPUT
PORT B
INPUT
PORT A
SW4 SW5
SW10
SW10
SW1
SW2
4−CHANNEL ASYNCHRONOUS
SAMPLE RATE CONVERTER
SRC4194
HOST PORT
BUFFER
HDR
CLOCK GEN
PLL1705
CLOCK GEN
PLL1705
DIT
CLOCK A
DIT
CLOCK B
SRC A
EXT CLOCK
SRC B
EXT CLOCK
RCKIA
RCKIB
HOST
PORT
Power Supplies are not shown in this diagram. Refer
to Figure 3−1 for power supply configuration details