Texas Instruments SRC4194EVM, Руководство пользователя

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SRC4194 Functional Block Diagram
1-3
Introduction
1.2 SRC4194 Functional Block Diagram
Figure 1−1 shows a functional block diagram of the SRC4194. The SRC4194
is segmented into two stereo SRC sections referred to as SRC A and SRC B.
Each section can operate independently from the other. Each section has its
own set of configuration pins in Hardware mode, and its own bank of control
and status registers in Software mode.
SRC A and SRC B have identical operations. Audio data is received at the in-
put serial port, clocked by either the audio source device in Slave mode, or by
the SRC4194 in Master mode. The output port data is clocked by either the
audio output device in Slave mode, or by the SRC4194 in Master mode. The
input data is passed through interpolation filters that up-sample the data,
which is then passed on to the re-sampler. The rate estimator compares the
input and output sampling frequencies by comparing LRCKI, LRCKO, and a
reference clock. The results of the rate estimation are used to configure the
re-sampler coefficients and data pointers.
The output of the re-sampler is passed on to either the decimation filter or
direct down-sampler function. The decimation filter performs down-sampling
and antialias filtering functions, and is required when the output sampling
frequency is equal to or lower than the input sampling frequency. The direct
down-sampling function does not provide any filtering, and may be used in
cases when the output sampling frequency is greater than the input sampling
frequency. The advantage of the direct down-sampling function is a significant
reduction in the group delay associated with the decimation function, allowing
lower latency processing.
For additional information regarding the SRC4194, please refer to the product
datasheet available from the TI web site, located at
http://www.ti.com .