Texas Instruments MSP430G2203, Техническое описание

Страница: 43 / 93

43
MSP430G2533, MSP430G2433, MSP430G2333, MSP430G2233
MSP430G2403, MSP430G2303, MSP430G2203
www.ti.com SLAS734G – APRIL 2011 – REVISED APRIL 2016
Submit Documentation Feedback
Product Folder Links: MSP430G2533 MSP430G2433 MSP430G2333 MSP430G2233 MSP430G2403 MSP430G2303
MSP430G2203
Detailed Description
Copyright © 2011–2016, Texas Instruments Incorporated
6.9.2 Calibration Data Stored in Information Memory Segment A
Calibration data is stored for both the DCO and for ADC10 organized in a tag-length-value structure (see
Table 6-10 and Table 6-11 ).
Table 6-10. Tags Used by the ADC Calibration Tags
NAME ADDRESS VALUE DESCRIPTION
TAG_DCO_30 0x10F6 0x01 DCO frequency calibration at V
CC
= 3 V and T
A
= 30°C
TAG_ADC10_1 0x10DA 0x10 ADC10_1 calibration tag
TAG_EMPTY – 0xFE Identifier for empty memory areas
Table 6-11. Labels Used by the ADC Calibration Tags
LABEL
ADDRESS
OFFSET
SIZE CONDITION AT CALIBRATION
CAL_ADC_25T85 0x0010 word INCHx = 1010b, REF2_5 = 1, T
A
= 85°C
CAL_ADC_25T30 0x000E word INCHx = 1010b, REF2_5 = 1, T
A
= 30°C
CAL_ADC_25VREF_FACTOR 0x000C word REF2_5 = 1, T
A
= 30°C, I
VREF+
= 1 mA
CAL_ADC_15T85 0x000A word INCHx = 1010b, REF2_5 = 0, T
A
= 85°C
CAL_ADC_15T30 0x0008 word INCHx = 1010b, REF2_5 = 0, T
A
= 30°C
CAL_ADC_15VREF_FACTOR 0x0006 word REF2_5 = 0, T
A
= 30°C, I
VREF+
= 0.5 mA
CAL_ADC_OFFSET 0x0004 word External VREF = 1.5 V, f
ADC10CLK
= 5 MHz
CAL_ADC_GAIN_FACTOR 0x0002 word External VREF = 1.5 V, f
ADC10CLK
= 5 MHz
CAL_BC1_1MHZ 0x0009 byte –
CAL_DCO_1MHZ 0x0008 byte –
CAL_BC1_8MHZ 0x0007 byte –
CAL_DCO_8MHZ 0x0006 byte –
CAL_BC1_12MHZ 0x0005 byte –
CAL_DCO_12MHZ 0x0004 byte –
CAL_BC1_16MHZ 0x0003 byte –
CAL_DCO_16MHZ 0x0002 byte –
6.9.3 Brownout
The brownout circuit is implemented to provide the proper internal reset signal to the device during power
on and power off.
6.9.4 Digital I/O
Up to three 8-bit I/O ports are implemented:
• All individual I/O bits are independently programmable.
• Any combination of input, output, and interrupt condition (port P1 and port P2 only) is possible.
• Edge-selectable interrupt input capability for all bits of port P1 and port P2 (if available).
• Read/write access to port-control registers is supported by all instructions.
• Each I/O has an individually programmable pullup or pulldown resistor.
• Each I/O has an individually programmable pin oscillator enable bit to enable low-cost capacitive touch
detection.