DAC81408
USB2ANY
Connector
Power and
External
Reference
Input
Connector
Output
Connector
Onboard Jumper
Settings
Onboard
Reference
Detailed Description
6
SLAU778A – June 2018 – Revised December 2018
Copyright © 2018, Texas Instruments Incorporated
DAC81408EVM
3
Detailed Description
3.1
Hardware Description
The following sections provide detailed information on the EVM hardware and jumper configuration
settings.
displays the default configurations of all jumper connections on the DAC81408EVM.
Table 5. Jumper Settings
Jumper
Default Position
Available Option
Description
J2
Open: RESET deactivated
Closed: RESET activated
RESET activation or deactivation
J3
Open: CLR deactivated
Closed: CLR activated
CLR activation or deactivation
J9
Closed: GND
Open: external REFGND
REFGND selection
J10
1-2: USB2ANY 3.3 V on J8.5
2-3: external VIO on J7.4
VIO selection
J11
1-2: VREF from REF5025
2-3: external VREF on J7.1
VREF selection note: deselect both
before selecting internal reference
J12
2-3: VSS on J7.6
1-2: GND
VSS selection
3.1.1
Theory of Operation for DAC81408 Hardware
The block diagram of the DAC81408EVM board is displayed in
. The EVM board connects to
external power supplies VCC, VSS, VDD/VAA and VIO through an external 7-pin terminal block. This
connector also provides an option for an external reference. The 32-pin header provides the eight DAC
outputs and other signals, such as VREF, TEMPOUT and ALMOUT. The 10-pin wire-to-board connector
provides an interface to the USB2ANY platform. The SPI signals are provided by using either the
USB2ANY header or the test points. The USB2ANY also provides the optional 3.3-V VIO selectable by
jumper settings. There is also an onboard 2.5-V reference source.
Figure 4. DAC81408EVM Hardware Block Diagram