SWRS046H – NOVEMBER 2006 – REVISED MARCH 2015
Table 5-23. FREQ_1A Register (05h)
DEFAULT
REGISTER
NAME
ACTIVE
DESCRIPTION
VALUE
FREQ_1A[7:0]
FREQ_1A[7:0]
177
—
Bit 15 to 8 of frequency control word A
Table 5-24. FREQ_0A Register (06h)
DEFAULT
REGISTER
NAME
ACTIVE
DESCRIPTION
VALUE
FREQ_0A[7:1]
FREQ_A[6:0]
124
—
7 LSB of frequency control word A
FREQ_0A[0]
DITHER_A
1
H
Enable dithering for frequency A
Table 5-25. CLOCK_A Register (07h)
DEFAULT
REGISTER
NAME
ACTIVE
DESCRIPTION
VALUE
CLOCK_A[7:5]
REF_DIV_A[2:0]
2
—
Reference frequency divisor (A):
0: Not supported
1: REF_CLK frequency = Crystal frequency / 2
…
7: REF_CLK frequency = Crystal frequency / 8
It is recommended to use the highest possible reference clock
frequency that allows the desired Baud rate.
CLOCK_A[4:2]
MCLK_DIV1_A[2:0]
4
—
Modem clock divider 1 (A):
0: Divide by 2.5
1: Divide by 3
2: Divide by 4
3: Divide by 7.5 (2.5 × 3)
4: Divide by 12.5 (2.5 × 5)
5: Divide by 40 (2.5 × 16)
6: Divide by 48 (3 × 16)
7: Divide by 64 (4 × 16)
CLOCK_A[1:0]
MCLK_DIV2_A[1:0]
0
—
Modem clock divider 2 (A):
0: Divide by 1
1: Divide by 2
2: Divide by 4
3: Divide by 8
MODEM_CLK frequency is FREF frequency divided by the product of
divider 1 and divider 2.
Baud rate is MODEM_CLK frequency divided by 8.
Table 5-26. FREQ_2B Register (08h)
DEFAULT
REGISTER
NAME
ACTIVE
DESCRIPTION
VALUE
FREQ_2B[7:0]
FREQ_B[22:15]
131
—
8 MSB of frequency control word B
Table 5-27. FREQ_1B Register (09h)
DEFAULT
REGISTER
NAME
ACTIVE
DESCRIPTION
VALUE
FREQ_1B[7:0]
FREQ_B[14:7]
189
—
8 MSB of frequency control word B
66
Detailed Description
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